LTE-A Module Series
EM12-G Hardware Design
EM12-G_Hardware_Design 19 / 62
7
USB_D+
USB_DP
IO
USB 2.0 differential data bus (+)
8
W_DISABLE1#
W_DISABLE1#
DI
Airplane mode control.
Active low.
1.8V/3.3V
power domain
9
USB_D-
USB_DM
IO
USB 2.0 differential data bus (-)
10
GPIO_9
WWAN_LED#
OD
It is an open collector and active
low signal.
It allows the module to provide
RF status indication via LED
devices provided by the system.
3.3V power
domain
11
GND
GND
Ground
12
Key
Notch
Notch
13
Key
Notch
Notch
14
Key
Notch
Notch
15
Key
Notch
Notch
16
Key
Notch
Notch
17
Key
Notch
Notch
18
Key
Notch
Notch
19
Key
Notch
Notch
20
GPIO_5
(AUDIO_0)
PCM_CLK
IO
PCM data bit clock. In master
mode, it is an output signal. In
slave mode, it is an input signal.
If unused, keep it open.
1.8V power
domain
21
CONFIG_0
CONFIG_0
Connected to GND internally.
EM12-G is configured as
WWAN-USB 3.0.
22
GPIO_6
(AUDIO_1)
PCM_IN
DI
PCM data input
1.8V power
domain
23
GPIO_11
(WOWWAN#)
WAKE_ON_
WAN#
OD
A signal to wake up the host.
It is an open collector and active
low signal.
1.8V power
domain
24
GPIO_7
(AUDIO_2)
PCM_OUT
DO PCM data output
1.8V power
domain
25
DPR
DPR
DI
Dynamic power reduction.
High level by default.
1.8V power
domain
26
GPIO_10
(W_DISABLE2#)
W_DISABLE2#*
DI
GNSS enable control.
Active low.
1.8V/3.3V
power domain
27
GND
GND
Ground
28
GPIO_8
PCM_SYNC
IO
PCM data frame synchronization 1.8V power