Quectel EG915U Series, Hardware Design

Page: 21 / 92

LTE Standard Module Series
EG915U_Series_Hardware_Design 20 / 81
MAIN_DCD 38 DO
Main UART data carrier
detect
V
OL
max = 0.45 V
V
OH
min = 1.35 V
MAIN_TXD 35 DO Main UART transmit
V
OL
max = 0.45 V
V
OH
min = 1.35 V
MAIN_RI 39 DO
Main UART ring
indication
V
OL
max = 0.45 V
V
OH
min = 1.35 V
MAIN_DTR 30 DI
Main UART data terminal
ready
V
IL
min = -0.3 V
V
IL
max = 0.6 V
V
IH
min = 1.26 V
V
IH
max = 2.0 V
Auxiliary UART Interface
Pin Name Pin No. I/O Description DC Characteristics comment
AUX_TXD 27 DO Auxiliary UART transmit
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power
domain.
If unused, keep it
open.
AUX_RXD 28 DI Auxiliary UART receive
V
IL
min = -0.3 V
V
IL
max = 0.6 V
V
IH
min = 1.26 V
V
IH
max = 2.0 V
1.8 V power
domain.
If unused, keep it
open.
Debug UART Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
DBG_RXD 22 DI Debug UART receive
V
IL
min = -0.3 V
V
IL
max = 0.6 V
V
IH
min = 1.26 V
V
IH
max = 2.0 V
1.8 V power
domain.
If unused, keep it
open.
DBG_TXD 23 DO Debug UART transmit
V
OL
max = 0.45 V
V
OH
min = 1.35 V
I2C Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
I2C _SCL 40 OD I2C serial clock
External pull-up
resistor is
required.
1.8 V only.
If unused, keep it
open.
The I2 C
interface
supports
simultaneous
I2C _SDA 41 OD I2C serial data