Quectel EG21-G, Hardware Design

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LTE Module Series
EG21-G Hardware Design
EG21-G_Hardware_Design 17 / 100
3.2.
Pin Assignment
The following figure shows the pin assignment of EG21-G module.
34
3
35 36 20 21 22 23 24 25 26 27 28 29 30 31 32 33
1
4
5
6
7
2
WAKEUP_IN
1)
AP_READY
RESERVED
W_DISABLE#
NET_MODE
1)
NET_ST ATUS
VDD_EXT
GND
GND
DBG_RXD
DBG_TXD
USIM_PRESENCE
USIM_VDD
USIM_DATA
USIM_CLK
USIM_RST
RESERVED
8
9
10
11
12
13
14
15
16
17
18
19
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55
USIM_GND
G
ND
R
E
S
E
T
_
N
P
W
R
K
E
Y
2
)
G
N
D
SD
_
IN
S
_
D
E
T
S
D
C
2
_
DA
T
A
3
S
D
C
2
_
DA
T
A
2
S
D
C
2
_
D
A
T
A
1
S
D
C
2
_
DA
T
A
0
S
DC
2
_
C
L
K
S
DC
2
_
C
M
D
A
N
T
_
D
IV
G
N
D
G
N
D
U
S
B
_
V
B
US
U
S
B
_
DM
U
S
B
_
DP
R
X
D
T
X
D
D
T
R
R
T
S
CT
S
DCD
RI
S
T
A
T
US
V
B
A
T
_
BB
V
B
A
T
_
BB
V
B
A
T
_
RF
V
B
A
T
_
RF
G
ND
R
E
S
E
R
V
E
D
GND
GND
ANT_MAIN
GND
ANT_GNSS
GND
ADC1
RESERVED
I2C_SDA
I2C_SCL
ADC0
GND
GND
GND
73
74
75
76
77
78
79
80
81
82
83
84
100
101
102
106
107
111
112
103
104 109
105 110
89 94 98
88
93 97
86 91 96
85 90 95 99
87 92
108
1
1
3
R
E
S
E
R
V
E
D
R
E
S
E
R
V
E
D
117
126
125
124
123
122
121
118
127
128
1
1
5
U
S
B
_
B
O
O
T
1
)
R
E
S
E
R
V
E
D
1
1
6
140
137
1)
136
1)
135
134
133
132
131
130
129
1
1
4
V
D
D
_
S
D
IO
Power Pins Signal Pins
GND Pins
RESERVED
RESERVED
14 1
14 2
RESERVED
RESERVED
14 3
14 4
119
120
RESERVED Pins
Bluetooth Pins
P
C
M
_
IN
3
)
P
C
M
_
O
U
T
3
)
P
CM
_
S
Y
NC
3
)
P
CM
_
CL
K
3
)
BT_CTS
1)
*
BT_RXD*
BT_TXD*
BT_RTS*
139*
138
1)
Figure 2: Pin Assignment (Top View)
1.
1) means that these pins cannot be pulled up before startup.
2.
2) PWRKEY output voltage is 0.8V because of the diode drop in the Qualcomm chipset.
3.
3)
means these interface functions are only supported on Telematics version.
4.
Keep all RESERVED pins and unused pins unconnected.
5.
Pads 37~40 and 139 are used for Bluetooth (BT) function pins. BT function is under development.
6.
GND pads 85~112 should be connected to ground in the design. RESERVED pads 73~84 should not
be designed in schematic and PCB decal, and these pins should be served as a keepout area.
7.
“*” means under development.
NOTES