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1.0

EG21-G

TITLE

PROJECT

Reference Design

A2

2019/12/5

DATE

3

14

VER

SIZE

Quectel Wireless Solutions

B

C

D

6

5

4

3

2

1

D

C

B

A

SHEET

1

2

3

4

5

6

A

OF

DRAWN BY

CHECKED BY

Woody WU

Lorry XU

Module Interface

1. Keep all RESERVED and unused pins unconnected, and ensure all GND pins are connected to the ground network.

Notes:

2. Pins 73

84  are unused in the design, and can be ignored in schematic and PCB decal.

3. A common mode choke L0101 is recommended to be added in series between the module and customers' MCU in order to

Meanwhile, it is recommended to reserve the test points for upgrading the firmware over USB interface and minimize the

4. ADC pins cannot be directly connected to the module's power supply and the input voltage must not exceed VABT_BB.
5. C0101 and C0102 should be placed close to the SGMII interface of the module.

Note 3

Note 6

Note 4

EG21-G

EG21-G

Note 5

extra stubs of the trace. The two resistors should be placed close to the module.

suppress EMI spurious transmission, and should be placed close to the module.

6. Do not pull up pin1,pin5, pin40,pin136,pin137and pin138 unless the module starts up sucessfully.

Meanwhile, these pins should be served as a keepout area.

R0111

NM_0R

R0109

NM_0R

R0113

100K

R0114

100K

R0116

100K

R0115

100K

R0118

0R

R0120

0R

R0122

0R

R0124

0R

R0108

0R

R0104

0R

R0106

0R

R0102

0R

1 WAKEUP_IN

2 AP_READY

3 RESERVED

4 W_DISABLE#

5 NET_MODE

6 NET_STATUS

7 VDD_EXT

8 GND

9 GND

10 USIM_GND

11 DBG_RXD

12 DBG_TXD

13 USIM_PRESENCE

14 USIM_VDD

15 USIM_DATA

16 USIM_CLK

17 USIM_RST

18 RESERVED

19

GN

D

20

RESET_N

21

PWRKEY

22

GN

D

23

SD2_INS_DET

24

PCM_IN

25

PCM_O

U

T

26

PCM_SYNC

27

PCM_CLK

28

SDC2_DATA3

29

SDC2_DATA2

30

SDC2_DATA1

31

SDC2_DATA0

32

SDC2

_CL

K

33

SDC2

_CM

D

34

VDD_SDI

O

35

ANT_DIV

36

GN

D

37

RESERVED

38

RESERVED

39

RESERVED

40

RESERVED

41

I2C_SCL

42

I2C_SDA

43

RESERVED

44

ADC1

45

ADC0

46

GND

47

ANT_GNSS

48

GND

49

ANT_MAIN

50

GND

51

GND

52

GND

53

GND

54

GND

55

RESERVED

56

GN

D

57

VBAT_RF

58

VBAT_RF

59

VBAT_BB

60

VBAT_BB

61

STATUS

62

RI

63

DCD

64

CTS

65

RTS

66

DTR

67

TXD

68

RXD

69

USB_DP

70

USB_DM

71

USB_VBUS

72

GN

D

115

USB_BO

O

T

116

RESERVED

113

RESERVED

114

RESERVED

141 RESERVED

142 RESERVED

143

RESERVED

144

RESERVED

U0101-A

85 GND

86 GND

87 GND

88 GND

89 GND

90 GND

91 GND

92 GND

93 GND

94 GND

95 GND

96 GND

97 GND

98 GND

99 GND

100 GND

101 GND

102 GND

103 GND

104 GND

105 GND

106 GND

107 GND

108 GND

109 GND

110 GND

111

GND

112

GND

117

RESERVED

118

RESERVED

119

EPHY_RST_N

120

EPHY_INT_N

121

SGMII_MDATA

122

SGMII_MCLK

123

SGMII_TX_M

124

SGMII_TX_P

125

SGMII_RX_P

126

SGMII_RX_M

127

RESERVED

128

USIM2_VDD

129

RESERVED

130

RESERVED

131

RESERVED

132

RESERVED

133

RESERVED

134

RESERVED

135

RESERVED

136

RESERVED

137

RESERVED

138

RESERVED

139

RESERVED

140

RESERVED

U0101-B

C0101

100nF

C0102

100nF

1

2

3

4

L0101

DLM0NSN900HY2D

[6]

USIM_GND

[14] DBG_RXD
[14]

DBG_TXD

[6] USIM_VDD

[6]

USIM_CLK

[6] USIM_RST

[6] USIM_DATA

[4,5,6,11,13,14]

VDD_EXT

[14]

NET_STATUS

[14]

NET_MODE

[4]

W_DISABLE_EG21-G

[4]

AP_READY_EG21-G

[4]

RESET_N

[4,14]

PWRKEY

[10]

ANT_DIV

[10]

ANT_MAIN

[10]

ANT_GNSS

[4,14]

USB_VBUS

[6]

RXD_EG21-G

[6]

TXD_EG21-G

[6]

DTR_EG

21

-G

[6]

RTS_EG21-G

[6]

CTS_EG21-G

[6]

DCD_EG

21

-G

[6]

R

I_EG21-G

[14]

STATUS

[3,5,14]

VBAT

[3,5,14]

VBAT

[6] USIM_PRESENCE

[7,8]

CODEC_PCM_IN

[7,8] CODEC_PCM_OUT

[7,8] CODEC_PCM_SYNC

[7,8] CODEC_PCM_CLK

[7,8]

I2C_SDA

[14]

USB_DM_TEST

[14]

USB_DP_TEST

ADC0_INPUT
ADC1_INPUT

[7,8]

I2C_SCL

[14]

USB_BOOT

[4]

WAKEUP_IN_EG21-G

[13]

SD2_INS_DET

[13]

SD2_DATA3

[13]

SD2_DATA2

[13]

SD2_DATA1

[13]

SD2_DATA0

[13]

SD2_CLK

[13]

SD2_CMD

[13]

VDD_SDI

O

[11]

USIM2_VDD

[11]

SGMII_RX_M

[11]

SGMII_RX_P

[11]

SGMII_TX_P

[11]

SGMII_TX_M

[11]

SGMII_MDIO_CLK

[11]

SGMII_MDIO_DATA

[11]

EPHY_INT_N

[11]

EPHY_RST_N

[4]

USB_DP

[4]

USB_DM

Summary of Contents for EG21-G

Page 1: ...EG21 G Reference Design LTE Standard Module Series Rev EG21 G_Reference_Design_V1 0 Date 2019 12 05 Status Released www quectel com...

Page 2: ...RS THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS REQUIREMENTS QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INF...

Page 3: ...LTE Standard Module Series EG21 G Reference Design EG21 G_Reference_Design 2 8 About the Document Revision History Revision Date Author Description 1 0 2019 12 05 Lim PENG Woody WU Initial...

Page 4: ..._Reference_Design 3 8 Contents About the Document 2 Contents 3 Figure Index 4 1 Reference Design 5 1 1 Introduction 5 1 2 Power on off and Resetting Scenarios 6 1 2 1 Power on Scenario 6 1 2 2 Power o...

Page 5: ...Standard Module Series EG21 G Reference Design EG21 G_Reference_Design 4 8 Figure Index FIGURE 1 TIMING OF TURNING ON MODULE 6 FIGURE 2 TIMING OF TURNING OFF MODULE 7 FIGURE 3 TIMING OF RESETTING MODU...

Page 6: ...8 1 Reference Design 1 1 Introduction This document provides the reference design for Quectel EG21 G module And the reference design includes power on off resetting scenarios block diagrams of power s...

Page 7: ...this time the BOOT_CONFIG pins can be set to high level by external circuit Figure 1 Timing of Turning on Module 1 Please make sure that VBAT is stable before pulling down PWRKEY pin The time between...

Page 8: ...g off Module 1 In order to avoid damaging internal flash please do not switch off the power supply when the module works normally Only after the module is shut down by PWRKEY or AT command the power s...

Page 9: ...e ensure that there is no large capacitance with the max value exceeding 10nF on PWRKEY and RESET_N pins 2 RESET_N only resets the internal baseband chip of the module and does not reset the power man...

Page 10: ...CHECKED BY Woody WU Lorry XU Power Supply Block Diagram DC DC DC 5V OUT e g DC 12V IN DC 3 8V 2 0A EG21 G MIC29302WU MOS ON OFF USB_VBUS EN VBAT_EN SGM2019 ADJYN5G TR DC 3 3V SGM2019 ADJYN5G TR DC 1...

Page 11: ...T_MAIN ADC0 ADC1 MAIN UART I2C ANT_MAIN WAKEUP_IN STATUS NET_MODE NET_STATUS MCU PWRKEY GPIO_03 GPIO_04 RESET_N GPIO_08 GPIO_05 W_DISABLE GPIO_06 USB USB 3 3V 1 8V ALC5616 TLV320AIC3104 or U SIM Card...

Page 12: ...SDC2_CMD 34 VDD_SDIO 35 ANT_DIV 36 GND 37 RESERVED 38 RESERVED 39 RESERVED 40 RESERVED 41 I2C_SCL 42 I2C_SDA 43 RESERVED 44 ADC1 45 ADC0 46 GND 47 ANT_GNSS 48 GND 49 ANT_MAIN 50 GND 51 GND 52 GND 53 G...

Page 13: ...etect the MCU s sleep state For more details please refer to It is used to wake up the module It is used to let the module enter airplane mode 4 WAKEUP_IN_EG21 G should be kept at low level before the...

Page 14: ...o ensure the audio codec Power on Sequence power on VDD_1V8 first then VDD_3 3V Note 1 If VDD_3 3V power supply needs to be switched off please keep CODEC_POWER_EN at high level SGMII It is used when...

Page 15: ...ic capacitance should not be more than 15pF and should be placed close to the U SIM card connector 6 For more information about the layout please refer to For more information about TXS0108E please re...

Page 16: ...D 7 AGND 10 LOUTR N 11 CPN2 12 CPP2 13 CPN1 14 CPP1 15 CPVDD 16 CPVPP 18 CPVREF 19 CPVEE 20 HPO_L 21 ADCDAT1 22 DACDAT1 23 LRCK1 26 SCL 27 SDA 28 GPIO1 IRQ1 29 DBVDD 30 DCVDD 31 MICVDD 32 MICBIAS1 8 V...

Page 17: ...when the surround stereo headphone driver with 32 load is used and is 30mW when the surround stereo headphone driver with 16 load is used 1 MCLK 2 BCLK 3 WCLK 4 DIN 5 DOUT 6 DVSS 7 IOVDD 8 SCL 9 SDA...

Page 18: ...aces need to be routed as differential pairs 4 All MIC and SPK signal traces should be routed with total grounding and far away from noise such as clock and DC DC signals etc 5 ALC5616 and TLV320AIC31...

Page 19: ...to use AT command to turn off diversity reception For more details of the AT command please refer to 3 If an active antenna is selected for the GNSS antenna a VDD power supply circuit is required if...

Page 20: ...close as possible beside the module with a 1 5k pull up resistor away from other signal traces L0901 C0913 and C0914 need to be placed close to Pin 3 2 SGMII data and control signals should be strictl...

Page 21: ...0 and the reference ground of the area should be complete 2 Keep skew of the MDI differential signals less than 20mil and the maximum trace length must be less than10 inches 3 The connection method be...

Page 22: ...sufficient current up to 0 8A needs to be provided 1 The pin 34 VDD_SDIO on the module can only be used for SDIO pull up resistors and its maximum output current is 50mA Notes The bypass capacitors C...

Page 23: ...is in sleep replace the power supply of indicators with controllable one 4 The module s debug UART interface supports 1 8V power domain Turn off the power when the module enters sleep mode 1 It is rec...

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