EG21-G
A2
Reference Design
2019/12/5
DATE
1.0
2
14
VER
TITLE
SIZE
PROJECT
Quectel Wireless Solutions
B
C
D
6
5
4
3
2
1
D
C
B
A
SHEET
1
2
3
4
5
6
A
OF
DRAWN BY
CHECKED BY
Woody WU
Lorry XU
NOTE:
A transistor translation circuit or a level translator TXS0108EPWR provided by Texas Instruments is recommended.
Reference Design Block Diagram
EG21-G
(U)SIM
VDD_EXT
FORCE_USB_BOOT
PCM
ANT_MAIN
ADC0
ADC1
MAIN UART
I2C
ANT_MAIN
WAKEUP_IN
STATUS
NET_MODE
NET_STATUS
MCU
PWRKEY
GPIO_03
GPIO_04
RESET_N
GPIO_08
GPIO_05
W_DISABLE#
GPIO_06
USB
USB
3.3V/1.8V
ALC5616
TLV320AIC3104
or
(U)SIM Card
SDC2
SD Card
UART
DEBUG UART
Test Points
12-bit ADC
0.3V
~
VBAT_BB
Status Indication
NOTE
VBAT
3.8V, 2.0A
AP_READY
GPIO_01
GPIO_02
GPIO_07
GPIO_09
VDD
VBAT_EN
VBUS_CTRL
CODEC_POWER_EN
SD_PWR_EN
VDD_MCU
VBAT
Transistor
Circuit
Main Antenna
Handset
or
Earphone
Level Translator
AR8033-AL1B-R
FC3004
SGMII
EPHY
RJ45
ANT_GNSS
ANT_GNSS
GNSS Antenna
ANT_DIV
ANT_DIV
Rx-diversity
Antenna