LTE Module Series
BG96 Hardware Design
BG96_Hardware_Design 28 / 78
To decrease voltage drop, a bypass capacitor of about 100µF with low ESR should be used, and a
multi-layer ceramic chip capacitor (MLCC) array should also be reserved due to its low ESR. It is
recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array, and
place these capacitors close to VBAT pins. The main power supply from an external application has to be
a single voltage source and can be expanded to two sub paths with star structure. The width of VBAT_BB
trace should be no less than 1mm, and the width of VBAT_RF trace should be no less than 2mm. In
principle, the longer the VBAT trace is, the wider it will be.
In addition, in order to get a stable power source, it is suggested to use a zener diode with reverse zener
voltage of 5.1V and dissipation power more than 0.5W, and place it as close to the VBAT pins as possible.
The following figure shows the star structure of the power supply.
Module
VBAT_RF
VBAT_BB
VBAT
C1
100uF
C6
100nF
C7
33pF
C8
10pF
+
+
C2
100nF
C5
100uF
C3
33pF
C4
10pF
D1
5.1V
Figure 4: Star Structure of the Power Supply
3.5.3. Monitor the Power Supply
AT+CBC
command can be used to monitor the VBAT_BB voltage value. For more details, please refer to
document [2]
.
3.6. Turn on and off Scenarios
3.6.1. Turn on Module Using the PWRKEY Pin
The following table shows the pin definition of PWRKEY.
