LPWA Module Series
BG950A-GL&BG951A-GL_Hardware_Design
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Table Index
Table 2: Brief Introduction of BG950A-GL & BG951A-GL Modules
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Table 3: Wireless Network Type
Table 5: I/O Parameters Definition
Table 7: Overview of Operating Modes
Table 8: Pin Definition of Power Supply
Table 9: Pin Definition of PWRKEY
Table 10: Pin Definition of RESET_N
Table 11: Pin Definition of PON_TRIG
Table 12: Pin Definition of (U)SIM Interface
Table 13: Pin Definition of USB Interface
Table 14: Pin Definition of Main UART Interface
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Table 15: Pin Definition of CLI UART Interface
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Table 16: Pin Definition of Debug UART Interface
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Table 17: Pin Definition of CLI/GNSS UART Interface
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Table 18: Pin Definition of PCM Interface
Table 19: Pin Definition of I2C Interface
Table 20: Pin Definition of ADC Interfaces
Table 21: Characteristics of ADC Interfaces
Table 22: Pin Definition of PSM_IND
Table 23: Pin Definition of NET_STATUS
Table 24: Working State of Network Connection Status Indication
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Table 25: Pin Definition of STATUS
Table 26: Pin Definition of MAIN_RI
Table 27: Default Behaviors of MAIN_RI
Table 28: Pin Definition of GRFC Interfaces
Table 29: Truth Table of GRFC Interfaces
Table 30: Pin Definition of GPIO Interface
Table 31: Pin Definition of Cellular Network Interface
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Table 32: Operating Frequency of BG950A-GL & BG951A-GL
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Table 34: Conducted RF Receiving Sensitivity of BG950A-GL
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Table 35: Conducted RF Receiving Sensitivity of BG951A-GL
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Table 36: Pin Definition of GNSS Antenna Interface
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Table 39: Antenna Design Requirements
Table 40: Absolute Maximum Ratings
Table 41: The Module’s Power Supply Ratings
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