Quatech MPA-100, User Manual

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9. COMMUNICATIONS REGISTER
The MPA-100 is equipped with an onboard Communications Register which gives the
user options pertaining to the clocks and testing. The user can specify the source and type of
clock to be transmitted or received. Test mode bits pertain only to the DTE versions and can be
ignored if using a DCE configured MPA-100. The address of this register is Base+4. Table 15
and the descriptions that follow detail the Communications Register.
NOTE:
The Local Loopback Test and the Remote Loopback Test cannot be
performed simultaneously. Thus, bits D5 and D4 of the
Communications Register should not be set (logic 1) simultaneously.
Table 15 Communications Register - Read/Write
0 0 TCKEN RCKEN RLEN LLEN 0 TM ST
D0 D1 D2 D3 D4 D5 D6 D7
D7 -TEST MODE STATUS:
This bit can read the status of the Test Mode signal on a MPA-100 configured as
DTE, allowing the user to monitor this signal without generating any interrupts.
D6 - Reserved, always 0.
D5 -LOCAL LOOPBACK ENABLE:
When set (logic 1), this bit allows the DTE to test the functionality of the DTE/DCE
interface and the transmit and receive sections of the local DCE. When cleared (logic 0), no
testing occurs. This can also be used as a general purpose output.
MPA-100 User's Manual 9-1