FUNCTIONAL DESCRIPTION
S C R A T C H P A D R E G I S T E R
This register is not used by the 16450/16550. It
may be used by the programmer for data storage.
F I F O I N T E R R U P T M O D E O P E R A T I O N *
1. The receive data interrupt is issued when the FIFO
r e a c h e s t h e t r i g g e r l e v e l . T h e i n t e r r u p t i s
c l e a r e d a s s o o n a s t h e F I F O f a l l s b e l o w t h e
trigger level.
2 . T h e i n t e r r u p t i d e n t i f i c a t i o n r e g i s t e r ' s r e c e i v e
data available indicator is set and cleared along
with the receive data interrupt above.
3 . T h e d a t a r e a d y i n d i c a t o r i s s e t a s s o o n a s a
c h a r a c t e r i s t r a n s f e r r e d i n t o t h e r e c e i v e r F I F O
and is cleared when the FIFO is empty.
I V . B A U D R A T E S E L E C T I O N
T h e 1 6 4 5 0 / 1 6 5 5 0 A C E d e t e r m i n e s t h e b a u d r a t e o f
t h e s e r i a l o u t p u t u s i n g a c o m b i n a t i o n o f t h e i n p u t
c l o c k f r e q u e n c y a n d t h e v a l u e w r i t t e n t o t h e b a u d r a t e
d i v i s o r l a t c h e s . S t a n d a r d P C , P C / X T , P C / A T , a n d P S / 2
serial interfaces use an input clock of 1.8432 MHz. To
i n c r e a s e v e r s a t i l i t y , t h e D S - 2 0 2 / D S - 3 0 2 u s e s a n
1 8 . 4 3 2 M H z c r y s t a l a n d a f r e q u e n c y d i v i d e r c i r c u i t t o
produce the standard clock frequency.
Jumper block J1 is used to set the frequency input
to the ACE. The jumper may be connected to divide the
1 8 . 4 3 2 M H z c l o c k i n p u t b y 1 , 2 , 5 , o r 1 0 . F o r
c o m p a t i b i l i t y a s s t a t e d a b o v e , J 1 s h o u l d b e c o n f i g u r e d
t o d i v i d e b y 1 0 a s s h o w n i n f i g u r e 7 ( d ) . A t a b l e o f
b a u d r a t e s a v a i l a b l e u s i n g t h e 1 . 8 4 3 2 M H z i n p u t i s
given in figure 7.
* with optional 16550.
