Manual for KinetiZ 7L
Advanced Chipset Features Setup
Figure-3 Advanced Chipset Features Setup Menu
The following indicates the options for each item and describes their meaning.
Item Option
Description
#
"
DRAM Timing
Enabled
Select Enabled for setting SDRAM timing by
By SPD
Disabled
SPD parameter.
# "
DRAM Clock
100M
Define DRAM frequency
133M
#
"
SDRAM Cycle
2/3
Defines the CLT timing parameter of SDRAM
Length
Latency Time = 2 clocks.
Latency Time = 3 clocks.
#
"
Bank Interleave
2 Bank
Allows you to set how many banks of SDRAM
4 Bank
for interleaving supported in your mainboard.
D i s a b l e d
#"
Memory Hole
15-16M
Memory Hole at 15-16M is reserved for expanded
ISA card.
Disabled
Not Set this memory hole.
# "
PCI master Pipeline
Enabled
Enables PCI master pipeline request.
Req
Disabled
Disables PCI master pipeline request.
# "
P2C/C2P
Enabled
Enables P2C/C2P concurrency.
Concurrency
Disabled
Disables P2C/C2P concurrency.
P2C means PCI to CPU, C2P means CPU to PCI.
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BIOS Description
