NOTE
The 0 (LSB) value within the SESR Mask is 0.
9.4.1.3 Status Byte Register
The Status Byte Register (STB) is built from all other status registers and masks. This register can be used in queries to determine if an event has been
detected and where that event has been detected.
Bit
Description
7 (MSB)
Not used
6
The Master Summary Status (MSS) bit is set from the STB and SRE Mask
5
The Event Status Bit (ESB) is set from the SESR and the SESR Mask
4
Message Available (MAV) is set when there is data in the output queue
3, 2, 1, 0 (LSB)
Not used
9.4.1.4 Service Request Enable Register (Mask)
The Standard Request Enable Register (SRE Mask) is used to build the Master Summary Status Bit (MSS) within the Status Byte Register (STB). To
ignore any of the events detected and set in the STB register itself, set the corresponding bit within the SRE Mask to 0. The STB can then be queried
and the value of the MSS can be used to determine the type of service request required based on the SRE Mask applied.
Bit
Description
7 (MSB)
Not used
6
The Master Summary Status (MSS) bit is set from the STB and SRE Mask
5
The Event Status Bit (ESB) is set from the SESR and the SESR Mask
4
Message Available (MAV) is set when there is data in the output queue
3, 2, 1, 0 (LSB)
Not used
Quantifi Photonics | SLED 1000 / 1300 Series PXIe User Manual | Document version 1.08
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