Power Application Controller
®
-19-
Copyright 2020 © Qorvo, Inc.
Rev 1.0
– Jan 17, 2020
5
PAC5526 IO
5.1
Overview
The Digital Peripheral MUX (DPM) on the PAC55XX family allows flexible assignment of
peripheral functions to IO pins.
Each member of the family has a different set of IO pins that are available. It is important during
application design that the designer consider the available IO pins to make sure the necessary
peripherals will be available.
Below is a diagram of the GPIO and MUX structure.
Figure 5-1 GPIO and DPM Block Diagram
Each IO can be configured to select 1 of up to 8 digital peripheral signals. Some IOs also may
be used as an ADC input. For information on how to configure the IO for each of these
situations, see the PAC55XX Family User Guide.
The PAC5526 has the following IO pins available for application use:
▪
PA[7:0]
– Reserved for MMPM, ASPD, CAFE
▪
PB[7:0]
– Reserved for ASPD
▪
PD[7:4]
▪
PE[3:0]
▪
PF[7:0]
▪
PG[6:3]
