Power Application Controller
®
-117-
Copyright 2020 © Qorvo, Inc.
Rev 1.0
– Jan 17, 2020
Figure 10-6
Low-side Gate Driver Waveforms
V
Time
V
GS
CFGDRV1.LS_TON_SET
I
DS
V
DS
PWM
I
DRV
CFGDRV1.LS_TON_SET
I
DRV
=DRVILIMLS.LSSOURCE
I
DRV
=Weak
I
DRV
=Max
I
DRV
=DRVILIMLS.LSSINK
The gate driver input is a PWM signal from the MCU’s PWM Timer. The user can configure the
amount of time to apply the controlled current gate driver by setting the
CFGDRV1.HS_TON_SET
for the high-side gate driver, or the
CFGDRV1.LS_TON_SET
for the
low-side gate driver. This is the amount of time from the input PWM edge transition during which
the current is controlled.
The duration of the controlled current may be set according to the following table.
