NANO-6062
Copyright © Portwell 2017 NANO-6062 User's Guide
28
5.2 Signal GPIO Signal
#Define GPCR 0x2B // GPIO Coutrol Register, Bit7 = GPIO7, Bit6 = GPIO6, ...,
// 0: Output; 1: Input
#Define GPDR 0x2C // GPIO Status Register, Bit7 = GPIO7, Bit6 = GPIO6, ...,
// 0: Low; 1: High
#Define EC_IOPort 0xE300 // Default, reference to BIOS configuration
VOID Write_EC_SRAM(UINT8 Offset,UINT8 Value){
IoWrite8(ECOffset,Value);
}
Byte Read_EC_SRAM(UINT8 Offset){
IoRead8(ECoffset,Value);
return Value;
}
void GPIO()
{
Summary of Contents for NANO-6062
Page 2: ...NANO 6062 Copyright Portwell 2017 NANO 6062 User s Guide 2 Revision History R1 0 Preliminary ...
Page 10: ...NANO 6062 Copyright Portwell 2017 NANO 6062 User s Guide 10 2 2 Mechanical Dimensions ...
Page 13: ...NANO 6062 Copyright Portwell 2017 NANO 6062 User s Guide 13 3 Block Diagram ...
Page 34: ...NANO 6062 Copyright Portwell 2017 NANO 6062 User s Guide 34 ...
Page 52: ...NANO 6062 Copyright Portwell 2017 NANO 6062 User s Guide 52 PCIe Port5 is assigned to M 2 ...
Page 54: ...NANO 6062 Copyright Portwell 2017 NANO 6062 User s Guide 54 PCI Express Root Port 6 ...
Page 84: ...NANO 6062 Copyright Portwell 2017 NANO 6062 User s Guide 84 7 2 5 Save Exit ...
Page 87: ...NANO 6062 Copyright Portwell 2017 NANO 6062 User s Guide 87 ...
Page 88: ...NANO 6062 Copyright Portwell 2017 NANO 6062 User s Guide 88 Serial ATA ...