Hardware Configuration
NANO-5050 User’s Manual
2-9
J22 : Coin Battery
PIN No.
Signal Description
1
Positive
2
Negative
J23 : Panel back light
PIN No.
Signal Description
1
+5V
2
GND/PWM
3
+12V
4
GND
5
BACKLIGH_EN/EN#
J24 : PCIe x 1
PIN No.
Signal Description
PIN No.
Signal Description
A1 SMBCLK
B1 +12V
A2 +12V
B2 +12V
A3 +12V
B3 +12V
A4 GND
B4 GND
A5 DF_PCIE_TXP2
B5 DF_
PCIE_CLKP
A6 DF_PCIE_TXN2
B6 DF_
PCIE_CLKN2
A7 DF_PCIE_RXP2
B7 GND
A8 DF_PCIE_RXN2
B8 +3.3V
A9 +3.3V
B9 CLKREQ2#
A10 +3.3V
B10 +3.3V_AUX
A11 RST#
B11 PCIE_WAKE#
A12 GND
B12 SMBDATA
A13 DF_
PCIE_CLKP1
B13 GND
A14 DF_
PCIE_CLKN1 B14 DF_PCIE_TXP1
A15 GND
B15 DF_PCIE_TXN1
A16 DF_PCIE_RXP1
B16 GND
A17 DF_PCIE_RXN1
B17 CLKREQ1#
A18 GND
B18 GND
J25 : CF-SATA
PIN No.
Signal Description
PIN No.
Signal Description
1 GND
26
CD1#
2 D3
27
D11
3 D4
28
D12
4 D5
29
D13
5 D6
30
D14
6 D7
31
D15
7 CS0#
32
CS1#
8 GND
33
VS1#
9 ATASEL#
34
IOR#
