PLX PEX 8648-AA, Hardware Reference Manual

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PEX 8648-AA RDK Hardware Reference Manual, Version 1.2
Copyright © 2010 by PLX Technology, Inc. All rights reserved
2
1.1 PEX 8648 Switch Features

48-Lane, 12-Port, 3-Station PCI Express Gen 2 switch

Standard 676-ball Flip Chip Plastic BGA (FCBGA) package (27 x 27 mm
2
) with Heat Spreader

480 GT/s aggregate bandwidth (5.0 GT/s/Lane x 48 SerDes Lanes x 2 (full duplex))

Non-blocking Crossbar Switch interface supports TLP bandwidth capacity of each x16 Link

Out-of-band communication/initialization interfaces (serial EEPROM and I
2
C)

2,048-byte Maximum Payload Size

Performance tuning

Choice of width (number of Lanes) per unique Link/Port – x4, x8, or x16

Allows any Port to be designated as the upstream Port (Port 0 is recommended)

Configuration with Strapping balls, serial EEPROM, or I
2
C

Lane reversal

Polarity reversal

Quality of Service (QoS) with one Virtual Channel (VC0) and eight Traffic Classes (TC[7:0])

Non-Transparent Bridging (NTB)

Read Pacing (intelligent bandwidth allocation)

Dual Cast

INTA# (PEX_INTA#) and FATAL ERROR (FATAL_ERR#) (Conventional PCI SERR# equivalent) ball
support

Compliant to the following specifications:

PCI Local Bus Specification, Revision 3.0

PCI Bus Power Management Interface Specification, Revision 1.2

PCI to PCI Bridge Architecture Specification, Revision 1.2

PCI Express Base Specification, Revision 2.0

PCI Express Card Electromechanical Specification, Revision 2.0

The I
2
C-Bus Specification, Version 2.1
1.2 PEX 8648 RDK Base Board Features

PLX PEX 8648 PCI Express Gen 2 switch in a 676-ball FCBGA package.

11 downstream PCI Express slot connectors. Hardware configuration is determined
by plug-in Configuration modules.

DIP switches, for hardware configuration of the PEX 8648 switch.

Transparent or Non-Transparent (NT) switch support.

Two Hot-Plug-controllable slots – one through a Parallel Hot-Plug Controller interface, and one through
the Serial Hot-Plug Controller interface.

Socketable serial EEPROM.

I
2
C interface, to read and write registers.

Manual pushbutton PERST#.

LED indicators for visual inspection of Port configuration and status.