1.1.1
Transmitter
A PCI Express Transmitter is typically a differential CML driver that transmits an 8b/10b encoded
bitstream across the Channel to the Receiver. The minimum differential voltage swing (V
TX-DIFF-PP
) of the
Transmitter is 800 mV at both 2.5 GT/s and 5.0 GT/s. The DC common mode voltage can be anywhere
between 0 and 3.6V; hence, AC-coupling capacitors are required to isolate the Transmitter’s
DC component from the Receiver’s fixed 0V DC common mode voltage. The AC-coupling capacitor
values must range between 75 and 200 nF, to ensure that the lower frequency components of the 8b/10b
encoded data are not affected.
illustrates what a generic PCI Express differential signal looks
like, as compared to a single-ended signal.
Note:
The swing values listed in
(400 mV and 800 mV) do not reflect default PLX register values.
PCI Express Transmitters are required to support de-emphasis. The role of de-emphasis is to increase
the resultant signal energy of the highest data frequencies and to counteract the frequency-dependent
Channel losses. De-emphasis does this by reducing the amount of energy used to transmit multiple
successive bits of the same polarity (
that is
, non-transition bits), compared to the amount of energy used
to transmit a set of transition bits (0 -> 1 or 1 -> 0). Transition bits have higher frequency components
than non-transition bits and are, therefore, more distorted by the low-pass Channel. This effect is one
aspect of
Inter-Symbol Interference
(ISI), which is a source of deterministic jitter in the system.
The
PCI Express Base Specification, Revision 2.0
, defines two de-emphasis levels for devices running at
5.0 GT/s, 3.0 to 4.0 dB and 5.5 to 6.5 dB. The desired de-emphasis level for a given Link is advertised by
the downstream Ports of a switch during Link recovery. Endpoints and the upstream device capture this
value and set their de-emphasis levels, accordingly. Longer Links should use 6.0 dB, whereas shorter
Links can use 3.5 dB.
The standard de-emphasis level is selectable by way of the PEX 8632
Link Control 2
register
Selectable
De-Emphasis
bit (Configuration register, offset 98h[6]).
TXp
PEX 8632-AA Quick Start Hardware Design Guide, Version 1.1
© 2007 PLX Technology, Inc. All Rights Reserved.
3
VTX-DC-CM
TXp - TXn
400mV
800mV
0V
Figure 2. Single-Ended versus Differential Voltage