75
XC-IS21MD
•
Block Diagram
BD7910FV (CORE MAIN ASSY : IC116)
• Head Driver
Pre Driver
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
– +
Vreg IN
Reg NF
Reg OUT
Reg DRV
VOS2
VDD
VOS1
VOD1
VOD2
N.C.
VSS
Reg GND
Reg SEL
VG
SVCC
PD GND
EFM
MUTE
N.C.
N.C.
+
–
2
Vcc
Power supply
3
CS
Chip selection input
4
SK
Serial clock input
5
DI
Start bit, operation code, address, and serial data input
6
DO
Serial data output, READY/BUSY internal status indication
output
7
GND
Ground
8
NC
Not connected
No.
Name
Description
6
PDGND
Predrive GND
7
EFM
EFM signal input
8
MUTE
Mute control
9
N.C.
10
N.C.
Not used
11
N.C.
12
VOD2
Sink output (lower side power MOS drain)
13
VSS
H-bridge GND (lower side power MOS source)
14
VOD1
Sink output (lower side power MOS drain)
15
VOS1
Source output (upper side power MOS source)
16
VDD
H-bridge power supply (upper side power MOS drain)
17
VOS2
Source output (upper side power MOS source)
18
RegDRV
External PNP drive output for the regulator
19
RegOUT
Regulator output (emitter follower output)
20
RegNF
Regulator feedback terminal
No.
Name
Description
1
VregIN
Regulator input and regulator power supply
2
RegGND
Regulator GND
3
RegSEL
Regulator selection terminal
4
VG
Power MOS drive voltage input
5
SVCC
EFM high-level output voltage
•
Pin Function
BR93LC56F (MD CORE MAIN UNIT : IC110)
• EEPROM
NC
GND
DO
DI
5
6
7
8
•
Pin Assignment (Top View)
•
Block Diagram
Dummy
Bit
Order
Register
Order Decode
Control
Clock Generation
Data
Register
Address
Buffer
Power Voltage Detection
Write
Inhibit
High
Voltage
Generation
Address
Decoder
R/W
Amp.
2048bits
EEPROM Array
16bits
16bits
7bits
7bits
3
4
SK
CS
Vcc
NC
DI
DO
GND
NC
6
5
1
2
8
7
www. xiaoyu163. com
QQ 376315150
9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
TEL 13942296513 QQ 376315150 892498299
TEL 13942296513 QQ 376315150 892498299