70
XC-IS21MD
•
Pin Assignment (Top View)
PD5523A (CORE MAIN ASSY : IC104)
• Mechanism Control microcomputer
•
Block Diagram
DMAC (2 channels)
D/A Converter
(8bits
×
2 channels)
A/D Converter
(10bits
×
8 channels)
(expansion to 10 channels possible)
System clock generation
XIN – XOUT
XCIN – XCOUT
UART/clock-synchronized SI/O
(8bits
×
2 channels)
SB
R0H
R0L
R1H
R1L
R2
R3
A0
A1
FB
INTB
ISP
USP
ROM
MEMORY
16 bits CPU CORE
I/O PORT
RAM
10k bite
Port P0
8
Port P1
8
Port P2
8
Port P3
8
Port P4
8
Port P5
8
Port P6
8
Port P7
8
Port P8
7
Port P85
Port P9
8
Port P10
8
(16 bits)
Register
Stack Pointer
Vector Table
Analog Multiplier
CHC operation circuit
(CCITT method)
(formation polynomial: X
16
+ X
12
+ X
5
+ 1)
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