Pioneer VSX-AX5Ai-S, Service Manual

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VSX-AX5Ai-S
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1 2 3 4
C
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F
A
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E
No. Pin Name I/O Function
49 XRESET I Logic reset input Reset for L
50 OUTPUTEN I Pin for controlling the audio system output H: output, L: Hi-Z
51 FMODE I Flow mode control input at flow: H, at through: L
52 SELDTYPE0 I Data type input 0 00: IEC60958, 01: MBLA
53 SELDTYPE1 I Data type input 1 1X: SACD
54 SEL44K I Selecting signal of master clock input at flow L: CLK48K, H: CLK44K
55 FSSEL0 I fs setting input 0 00: 44.1/48kHz, 01: 88.2/96kHz
56 FSSEL1 I fs setting input 1 10: 176.4/192kHz, 11: 29.4/32kHz
57 VSSOUT
−
Digital GND
58 VDDOUT
−
Digital VDD (3.3V)
59 RXSTART I Trigger signal input of flow receiving start
60 SACDCHSEL I In a through mode, set to 1 in SACD 5 channel receiving. 0: 2ch•6 ch, 1: In 5ch flow receiving, a channel
is distinguished automatically by ansillary data.
61 FMUTE I Forced mute control signal input Reflect to SDMUTEO.
62 FSTATE0 O Status output 0 of memory in the flow
63 FSTATE1 O Status output 1 of memory in the flow 00: Empty < 01: fast < 11: standard < 10: slow • full
64 FSTATE2 O
Status output 2 of flow receive data When received data type to be different from the set data type,active
High.
65 TDI I Boundary Scan TAP pin
66 TDO O Boundary Scan TAP pin
67 TMS I Boundary Scan TAP pin
68 TCK I Boundary Scan TAP pin
69 TRST I Boundary Scan TAP pin
70 SACDMKIN I SACD bit clock input
71 SACDFRIN I SACD frame signal input
72 SACDD0IN I SACD data input 0 (ch1)
73 VSSCORE
−
Digital GND (for inside)
74 VDDCORE
−
Digital VDD (3.3V, for inside)
75 SACDD1IN I SACD data input 1 (ch2)
76 SACDD2IN I SACD data input 2 (ch3)
77 SACDD3IN I SACD data input 3 (ch4)
78 SACDD4IN I SACD data input 4 (ch5)
79 SACDD5IN I SACD data input 5 (ch6)
80 SACDDAIN I SACD ansillary data input
81 AMCLKIN I Master clock input (VCO) at through mode
82 SPDIFIN I IEC60958 input Data valid input at flow
83 SDMUTEIN I Mute flag input at through mode
84 SDERRIN I Data error flag input
85 VCOCLK2O O VCO clock output 2 (for 512fs)
86 VCOCLK1O O VCO clock output 1 (for 768fs)
87 REFSYT I PLL reference input (at passive filter)
88 DIVVCO I PLL VCO dividing input (at passive filter)
89 VCOEN I Built-in VCO control input Low: stop, High: oscillation
90 VSSCORE
−
Digital GND (for inside)
91 VDDCORE
−
Digital VDD (3.3V, for inside)
92 VSSOUT
−
Connect to analog GND
93 VSSPASS
−
Analog GND
94 VDDPASS
−
Analog VDD (3.3V)
95 LPOUT O Phase comparator output (analog)
96 LPIN I VCO control voltage input (analog)