PDP-5071PU
215
5
6
7
8
5
6
7
8
C
D
F
A
B
E
Sil9023CTU (MAIN ASSY : IC5401)
•
HDMI Rx
Block Diagram
HDCP
Decryption
Engine
Registers
----------------
Configuration
Logic Block
XOR
Mask
I
2
C
Slave
24
DE
Q[23:0]
R1XC
±
R1X0
±
R1X1
±
R1X2
±
INT
RESET#
SPDIF
MCLKOUT
PanelLink
TMDS
TM
Digital
Core
MCLK
Gen
HSYNC
VSYNC
ODCK
SD0
SCK
W S
I
2
C
Slave
CSDA
CSCL
R0XC
±
R0X0
±
R0X1
±
R0X2
±
PanelLink
TMDS
TM
Digital
Core
Port
MUX
24-Bit
Data
DSDA1
DSCL1
Port
MUX
DSDA0
DSCL0
HDCP Keys
EEPROM
24-Bit
Data
SCDT
XTALIN
XTALOUT
Control Signals
Video Color
Space
Converter
Up/Down
Sampling
24-Bit Encrypted
Pixel Data
MUTEOUT
Audio
Data
Decode
HDMI
Mode
Control
Aux
Data
24-Bit
Decrypted
Pixel Data
CLK48B
HS,VS,
DE
HS,VS,
DE
Auto A/V
Exception
Handling
R0PWR5V
R1PWR5V
Port
Detect
EVNODD
Summary of Contents for PDP-5070PU
Page 43: ...PDP 5071PU 43 5 6 7 8 5 6 7 8 C D F A B E ...
Page 47: ...PDP 5071PU 47 5 6 7 8 5 6 7 8 C D F A B E REGULAR AWV2313 AWW1154 ELITE AWV2310 AWW1158 ...
Page 57: ...PDP 5071PU 57 5 6 7 8 5 6 7 8 C D F A B E ...
Page 79: ...PDP 5071PU 79 5 6 7 8 5 6 7 8 C D F A B E 500ns div 500ns div 200ns div ...
Page 200: ...PDP 5071PU 200 1 2 3 4 1 2 3 4 C D F A B E Block Diagram R2S11002AFT MAIN ASSY IC4701 AV SW ...