Pioneer Elite PD-D6-J, Service Manual

Page: 92 / 96

PD-D6-J
92
1 2 3 4
1 2 3 4
C
D
F
A
B
E
No. Name Alt. I/O Function
174 RD26
SDCS1
MSCLK
SMPTE_Y[2]
Inout
Non-pull
DRAM data 26
While using 16-bits wide DRAM:
Serial interface port 1 chip select
Memory Stick Clock part II
Digital Video output Y bit 2
GPIO
172 RD27
SCLK2
SDCLK
SMPTE_Y[3]
Inout
Non-pull
DRAM data 27
While using 16-bits wide DRAM:
Serial interface port 2 clock pin
Security Disk Clock part II
Digital Video output Y bit 3
GPIO
171 RD28
SDIN2
SD_CMD
SMPTE_Y[4]
Inout
Non-pull
DRAM data 28
While using 16-bits wide DRAM:
Serial interface port 2 data-in
SD Card CMD pin part II
Digital Video output Y bit 4
GPIO
170 RD29
SDO2
SD_DAT
SMPTE_Y[5]
Inout
Non-pull
DRAM data 29
While using 16-bits wide DRAM:
Serial interface port 2 data-out
SD Card Data pin part II
Digital Video output Y bit 5
GPIO
169 RD30
SDCS2
SMPTE_Y[6] Inout
Pull-Up
DRAM data 30
While using 16-bits wide DRAM:
Serial interface port 2 chip select
Digital Video output Y bit 6
GPIO
168 RD31
INT5#
ASDATA5
SMPTE_Y[7]
Inout
Pull-Up
DRAM data 31
While using 16-bits wide DRAM:
Microcontroller external interrupt 5
Audio serial data 5 part III : DSD data sub-woofer channel or Microphone
output
Digital Video output Y bit 7
GPIO
166 RA4 Inout DRAM address 4
165 RA5 Inout DRAM address 5
164 RA6 Inout DRAM address 6
162 RA7 Inout DRAM address 7
160 RA8 Inout DRAM address 8
159 RA9 Inout DRAM address 9
158 RA11 GPIO
Inout
Pull-Down
DRAM address bit 11
While using DRAM size <=4MB:
GPIO
157 CKE output DRAM clock enable
156 RCLK Inout DRAM clock
154 RCLKB USB_CLK Inout
DRAM clock invert
While not using DDR:
I) USB port CLK input (48MHz) part I
153 RVREF V_ADIN3 Analog Inout
Reference voltage for DDR DRAM
While not using DDR :
Version AD input port 3
151 RA3 Inout DRAM address 3
150 RA2 Inout DRAM address 2
149 RA1 Inout DRAM address 1
147 RA0 Inout DRAM address 0
146 RA10 Inout DRAM address 10
145 BA1 Inout DRAM bank address 1
143 BA0 Inout DRAM bank address 0