Pioneer DVJ-X1 - Professional DVD Turntable, Service Manual, Page: 130 / 136

DVJ-X1
130
1 2 3 4
1 2 3 4
C
D
F
A
B
E
No. Pin Name I/O Pin Function No. Pin Name I/O Pin Function
95 VssQ-
−
Power supply for input/output (0V) 142 GSL_XIRQS I GSL XIRQS interruption
96 XCS0 O Chip select 0 143 GSL_XIRQ I GSL XIRQ interruption
97 VccQ
−
Power supply for input/output (3.3V) 144 SHMD0
−
Clock mode setting
98 XCS2 O Chip select 2 145 Vcc-PLL1
−
Power supply for PLL1 (2.0V)
99 XCS3 O Chip select 3 146 CAP1
−
External capacitor pin for PLL1
100 XCS4 O Chip select 4 147 Vss-PLL1
−
Power supply for PLL1 (0V)*2
101 XCS5 O Chip select 5 148 Vss-PLL2
−
Power supply for PLL2 (0V)*2
102 XCS6 O Chip select 6 149 CAP2
−
External capacitor pin for PLL2
103 P_XI O Progressive/interlace switch 150 Vcc-PLL2
−
Power supply for PLL2 (2.0V)
104 XCSPRO2 O Chip select output for PM0033A 151 AUDCK
−
Use with JTAG terminal
105 CKE O CKE(SDRAM) 152 Vss
−
Power supply (0V)
106 XRAS3L O RAS3L(SDRAM) 153 Vss
−
Power supply (0V)
107 AV1_RST O AV-1 reset (H: reset) 154 Vcc
−
Power supply (2.0V)
108 CASL O CASL(SDRAM) 155 XTAL
−
XTAL connection pin
109 VssQ
−
Power supply for input/output (0V) 156 EXTAL
−
XTAL connection pin GND connection
110 MOT_RST O
Reset output for Motorola DSP (H: reset)
157 TI_PCMACK O TI DSP output data acknowledge
111 VccQ
−
Power supply for input/output (3.3V) 158 TI_BSACK O TI DSP input data acknowledge
112 TI_RST O Reset output for TI DSP (H: reset) 159 FPGA_PRG O PRG for FPGA configration
113 VDEC_RST O
Reset output for MPEG decoder (H: reset) 160 XIRQOUT
O
−
114 XDACK0 O DMA acknowledge 0 161 VssQ
−
Power supply for input/output (0V)
115 XDACK1 O DMA acknowledge 1 162 CKIO I Clock input (66MHz)
116 AQE_RST O PD0274A reset (H: reset) 163 VccQ
−
Power supply for input/output (3.3V)
117 AUDIO_SEL O
DJ, normal CD mode/X normal DVD
(AV-1) mode switch
164 TxD0 O
Serial data output for FPGA
configration/PM0033A
118 44/48 O 44.1/X48K selection 165 SCK0 O
Serial clock output for FPGA
configration/PM0033A
119 MUTE O
Audio output stage mute (H: mute on )
166
− − −
120 TDO
−
Use with JTAG terminal 167
− − −
121 BACK O NC 168 TXD2 O RS-232C communication output
122 BREQ I pull up 169
− − −
123 XWAIT I Hardware wait request 170
− − −
124 RESETM I pull up 171 MODE_SW I Normal mode/XDJ mode switching SW
125 FPGA_DONE I DONE for FPGA configration 172
− − −
126 RY/XBY I Connect to flash ROM 173 Vss
−
Power supply (0V)
127 ASEMD0
−
Use with JTAG terminal 174 RxD2 I RS-232C communication input
128 ASEBRKAK
−
Use with JTAG terminal 175 Vcc
−
Power supply (2.0V)
129 FPGA_XINIT I INIT for FPGA configration 176 AV1_XINT2 I AV-1 INT2 interruption
130 AUDATA[3]
−
Use with JTAG terminal 177 VQE_RST O
Reset of PM0033A and ADV7172 (H: reset)
131 AUDATA[2]
−
Use with JTAG terminal 178 DMA_RST O
Reset output for DMA FPGA (H: reset)
132 Vss
−
Power supply (0V) 179 CAP_RST O
Reset output for capture FPGA (H: reset)
133 AUDATA[1]
−
Use with JTAG terminal 180 VMC_RST O
Reset output for VMC FPGA (H: reset)
134 Vcc
−
Power supply (2.0V) 181 VssQ
−
Power supply for input/output (0V)
135 AUDATA[0]
−
Use with JTAG terminal 182 CARD_RST
−
TE4300 reset (H: reset)
136 XTRST
−
Use with JTAG terminal 183
VccQ
−
Power supply for input/output (3.3V)
137 TMS
−
Use with JTAG terminal 184
−
O
−
138 TDI
−
Use with JTAG terminal 185
CAP_XINT
I Capture FPGA interruption
139 TCK
−
Use with JTAG terminal 186
CARD_XINT
I TE4300 interruption
140 VDEC_XINT I MPEG2 decoder interruption 187 DMA_XINT I DMA FPGA interruption
141 AV1_XINTR I AV-1 INTR interruption 188 DONE_SEL I
DONE signal selection (1: all, 0: DMA
FPGA only)