Pioneer DJM-800, Service Manual

Page: 153 / 176

DJM-800
153
5 6 7 8
5 6
7
8
C
D
F
A
B
E
No. Mark Pin Name I/O Pin Function
49 P17 SW_MAT7 I KEY matrix b7 input
50 VSS VSS I GND
51 P20 SW_SCAN0 O KEY SCAN ADDRESS
52 P21 SW_SCAN1 O KEY SCAN ADDRESS
53 P22 SW_SCAN2 O KEY SCAN ADDRESS
54 TXD4 SIO4_TXD O Vacant, CH1 line select, H : LINE, L : CD/DIGITAL
55 RXD4 INPUT_SEL1 I
56 P25 MIC_OUT I BOOTH MONITOR MIC CUT/ADD H : CUT, L : ADD
57 P26 FL_LAT O For FL control
58 P27 FL_BK O For FL control
59 P83 INPUT_SEL2 O H : PHONO, L : CD/DIGITAL
60 P84 INPUT_SEL3 O H : PHONO, L : LINE/DIGITAL
61 P85 INPUT_SEL4 O H : PHONO, L : LINE/DIGITAL
62 DCTL DCTL I L fixing
63 D0 D0 I/O Data bus D0
64 D1 D1 I/O Data bus D1
65 D2 D2 I/O Data bus D2
66 D3 D3 I/O Data bus D3
67 D4 D4 I/O Data bus D4
68 D5 D5 I/O Data bus D5
69 D6 D6 I/O Data bus D6
70 VSS VSS I GND
71 D7 D7 I/O Data bus D7
72 VCC VCC I Power supply
73 D8 D8 I/O Data bus D8
74 D9 D9 I/O Data bus D9
75 D10 D10 I/O Data bus D10
76 D11 D11 I/O Data bus D11
77 D12 D12 I/O Data bus D12
78 D13 D13 I/O Data bus D13
79 D14 D14 I/O Data bus D14
80 D15 D15 I/O Data bus D15
81 P60 LED_DIG0 O LED display selectio A_0
82 P61 LED_DIG1 O LED display selectio A_1
83 P62 LED_DIG2 O LED display selectio A_2
84 WAIT WAIT I For bus control FPGA request
85 PF1 EFCT_PARA10 I For encoder input detection
86 PF2 EFCT_PARA11 I For encoder input detection
87 PF3 LWRn O For bus control Use for LED control.
88 PF4 HWRn O For bus control FPGA
89 PF5 RDn O For bus control FPGA
90 PF6 Asn O For bus control FPGA
91 PLLVCC PLLVCC I Power supply for internal PLL oscillator VCC
92 RESn RESn I Reset input
93 PLLVSS PLLVSS I GND for internal PLL oscillator
94 PF7 O TEST Pin
95 VSS VSS I GND
96 XTAL XTAL I Crystal connection pin