DEH-P4950MP/XU/CN5
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6.4 SYSTEM MICROCOMPUTER TEST PROGRAM
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PCL Output
In the normal operation mode (with the detachable panel installed, the ACC switched ON, the standby mode
cancelled), shift the TESTIN IC601(Pin 88) terminal to H.
The clock signal is output from the PCL terminal IC601(Pin 39).
The frequency of the clock signal is 468 750 Hz that is one 32th of the fundamental frequency.
The clock signal should be 468 750 Hz(- 10 Hz, + 15 Hz).
If the clock signal is out of the range, the X'tal (X601) should be replaced with new one.
Summary of Contents for DEH-P4950MP
Page 5: ...DEH P4950MP XU CN5 5 5 6 7 8 5 6 7 8 C D F A B E 1 SPECIFICATIONS ...
Page 10: ...DEH P4950MP XU CN5 10 1 2 3 4 1 2 3 4 C D F A B E 2 3 CD MECHANISM MODULE ...
Page 25: ...DEH P4950MP XU CN5 25 5 6 7 8 5 6 7 8 C D F A B E C a C b C b 2 3 A CN701 6 ...
Page 32: ...DEH P4950MP XU CN5 32 1 2 3 4 1 2 3 4 C D F A B E A A TUNER AMP UNIT TEST 1 ...
Page 35: ...DEH P4950MP XU CN5 35 5 6 7 8 5 6 7 8 C D F A B E ...
Page 37: ...DEH P4950MP XU CN5 37 5 6 7 8 5 6 7 8 C D F A B E C SIDE B C CD CORE UNIT S10 5COMP2 ...
Page 62: ...DEH P4950MP XU CN5 62 1 2 3 4 1 2 3 4 C D F A B E 7 2 2 DISPLAY LCD YAW5080 SEGMENT COMMON ...
Page 64: ...DEH P4950MP XU CN5 64 1 2 3 4 1 2 3 4 C D F A B E 8 OPERATIONS ...
Page 65: ...DEH P4950MP XU CN5 65 5 6 7 8 5 6 7 8 C D F A B E ...
Page 66: ...DEH P4950MP XU CN5 66 1 2 3 4 1 2 3 4 C D F A B E CXX2204 ...
Page 67: ...DEH P4950MP XU CN5 67 5 6 7 8 5 6 7 8 C D F A B E Connection Diagram ...