DEH-P3950MP/XU/ES
59
5
7
8
5
6
7
8
C
D
F
A
B
E
+BUP
VDD
SYS+B
SWVDD
SW5V
SW5VCONT
SYSPW
BSENS
VDDCONT
8
7
6
5
4
3
2
1
-
Block Diagram
10
+B
9
+BUP
8
VDD
5
SW5V
7
SYS+B
6
SWVDD
2
BSENS
4
SW5VCONT
3
SYSPW
1
VDDCONT
12
GND
Overvoltage
Protection
TSD
(OFF except VDD)
Pre Reg
Vref
Overvoltage
Protection
(All Ourput OFF)
+B
+B
+B
+B
VDD
Reduced-voltage
Detection
+B
VDD
Overvoltage Detection
BA4918-V12
PN5011A
144
37
72
109
36
73
108
1
Format
Meaning
C
CMOS
N
Nch open drain
Pin No.
Pin Name
I/O
Function and Operation
133
134
135
136
137-140
141
142
143
144
P7AVSS
P7AVDD
AVSS
SL
NC
MODELAD
KEYAD
NC
AVREF0
I
I
I
Format
GND for port 7
VDD for port 7
A/D converter GND
Signal level input
Not used
Model select terminal
Wired remote control AD input
Not used
A/D converter reference voltage
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9
9
2
8
9
4
2
9
8
TEL 13942296513
9
9
2
8
9
4
2
9
8
0
5
1
5
1
3
6
7
3
Q
Q
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TEL 13942296513 QQ 376315150 892498299
