Phytec phyCORE-OMAP44 Series, Hardware Manual

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Part I: PCM-049/phyCORE-OMAP44xx System on Module phyCORE-OMAP44xx
68 ©
PHYTEC Messtechnik GmbH
2012
L-760e_1
1.12.1 Primary Camera Interface (CSI2-A/CSI21)
The primary camera interface (CSI2-A/CSI21) is compatible to the MIPI® Camera Serial Interface (CSI2)
specification and supports 4 data lanes.
The following table shows the location of the applicable interface signals of the primary camera interfaces on
the phyCORE-Connector.
Pin # Signal I/O SL Description
X1A13 X_CSI21_DX0 I CSI CSI2-A (CSI21) differential
clock positive input
X1A14 X_CSI21_DY0 I CSI CSI2-A (CSI21) differential
clock negative input
X1A15 X_CSI21_DX1 I CSI CSI2-A (CSI21) differential
data lane positive input 1
X1A16 X_CSI21_DY1 I CSI CSI2-A (CSI21) differential
data lane negative input 1
X1B15 X_CSI21_DX2 I CSI CSI2-A (CSI21) differential
data lane positive input 2
X1B16 X_CSI21_DY2 I CSI CSI2-A (CSI21) differential
data lane negative input 2
X1B5 X_KPD_COL4_CSI21_DX3 O/I VCC_1V8_IO / CSI Keyboard column 4 (open
drain) / CSI2-A (CSI21)
differential data lane posi-
tive input 3 (see note below)
X1B6 X_KPD_ROW4_CSI21_DY3 I 1.8 V / CSI Keyboard row 4 / CSI2-A
(CSI21) differential data
lane negative input 3
(see note below)
X1B7 X_KPD_COL5_CSI21_DX4 O/I VCC_1V8_IO / CSI Keyboard column 5 (open
drain) / CSI2-A (CSI21)
differential data lane posi-
tive input 4 (see note below)
X1B8 X_KPD_ROW5_CSI21_DY4 I 1.8 V / CSI Keyboard row 5 / CSI2-A
(CSI21) differential data
lane negative input 4
(see note below)
Table 34:
Primary Camera Interface (CSI2-A/CSI21) Signal Location
Note:
Pins X1B5 to X1B8 on the phyCORE-Connector provide either signals of the keyboard interface, or camera
lanes 3 and 4 of the primary camera interface. The resistor array JN1 allows to choose which signals are
brought out at these pins. In order to use lanes 3 and 4 of the primary camera interface JN1 must be set to
position 2. Please refer to
Figure 6 to see where JN1 is located.