Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.
Figure 9-4 HY5DU121622DTP-D43 512Mb Block Diagram
FUNCTIONAL BLOCK DIAGRAM (32Mx16)
4Banks x 8Mbit x 16 I/O Double Data Rate Synchronous DRAM
Se
n
se A
M
P
Se
n
se A
M
P
Se
n
se A
M
P
Mode
Register
Command
Decoder
CLK
/CLK
CKE
/CS
/RAS
/CAS
/WE
UDQM
Bank
Control
Mode
Register
Row
Decoder
8Mx16 BANK 0
8Mx16 BANK 1
8Mx16 BANK 2
8Mx16 BANK 3
Memory
Cell
Array
Sen
se AMP
Column
Decoder
Address
Buffer
A0
A1
A
max
BA0
BA1
Column Address
Counter
16
Out
p
u
t Buffer
DQ0
DQ15
In
put
Buffer
DS
32
2-b
it Prefetch Unit
Write Data Register
2-bit Prefetch Unit
16
32
Data Strobe
Transmitter
Data Strobe
Receiver
UDQS,
LDQS
UDQS,
LDQS
DLL
Block
CLK,
/CLK
CLK_DLL
Mode
Register
LDQM