Philips TDA9605H Datasheet Download Page 28 | Manualshive

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1999 Apr 14

28

Philips Semiconductors

Product specification

Audio processor with head amplifier for VHS hi-fi

TDA9605H

Table 27 Volume left sign (bit VLS), volume left (bits VL5 to VL0), volume right sign (bit VRS) and volume right

(bits VR5 to VR0); note 1

Notes

1. X = don’t care.

2. Power-on reset state.

VLS

VL5

VL4

VL3

VL2

VL1

VL0

MODE

DESCRIPTION

VRS

VR5

VR4

VR3

VR2

VR1

VR0

0

0

0

0

0

0

0

0 dB

volume 0 dB

0

0

0

0

0

0

1

−

1 dB

volume

−

1 dB

0

0

0

0

0

1

0

−

2 dB

volume

−

2 dB

:

:

:

:

:

:

:

:

:

0

1

0

1

1

1

0

−

46 dB

volume

−

46 dB

0

1

0

1

1

1

1

−

47 dB

volume

−

47 dB

0

1

1

X

X

X

X

mute

mute

1

X

X

0

0

0

0

0 dB

volume 0 dB; note 2

1

X

X

0

0

0

1

1 dB

volume 1 dB

1

X

X

0

0

1

0

2 dB

volume 2 dB

:

:

:

:

:

:

:

:

:

1

X

X

1

1

1

0

14 dB

volume 14 dB

1

X

X

1

1

1

1

15 dB

volume 15 dB

7.9

Power byte at subaddress 07H

The power byte is used for power-up settings and the
standby control mode.

7.9.1

C

ALIBRATION START

Automatic frequency calibration by setting the hi-fi modem,
the band-pass filter and the noise reduction is performed
after a change of bit CALS from logic 0 to logic 1. The use
of auto-calibration is only needed after power-up
(Power-on reset) of the supply voltage (see Section 6.5).

Table 28 Calibration start (bit CALS)

Note

1. Power-on reset state.

The output signal on pin ENVOUT or bit CALR (calibration
ready) and bit CALE (calibration error) of the read byte can
be monitored to check for completion of the calibration.

CALS

MODE

DESCRIPTION

0

no calibration note 1

1

start
calibration

start of the automatic calibration
cycle

The combination of bit CALR = 1 and bit CALE = 0
indicates a successful calibration. Bit CALS should remain
at logic 1 after the calibration to keep a reliable state of
bit CALR and bit CALE.

7.9.2

DC

OUTPUT VOLTAGE SELECTION

The DC output level on pins LINEL, LINER, DECL
and DECR can be changed by setting bit VCCS to
maximize the output power when using a supply voltage
of 12 V.

The use of power muting (bit MUTE = 1) ensures
disturbance free switching of the line output signal when
setting bit VCCS after power-up.

Table 29 V

CC

supply voltage select (bit VCCS)

Note

1. Power-on reset state.

VCCS

MODE

DESCRIPTION

0

9 V

line and decoder output DC voltage
is 4.5 V; note 1

1

12 V

line and decoder output DC voltage
is 6 V

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Summary of Contents for TDA9605H

Page 1: ...DATA SHEET Product specification File under Integrated Circuits IC02 1999 Apr 14 INTEGRATED CIRCUITS TDA9605H Audio processor with head amplifier for VHS hi fi ...

Page 2: ...at subaddress 02H 7 6 1 Input select 7 6 2 Normal select 7 7 Output byte at subaddress 03H 7 7 1 Line output amplification 7 7 2 Output select 7 7 3 Envelope output select 7 7 4 Line output select 7 7 5 Decoder output select 7 7 6 RF converter mute 7 8 Volume bytes at subaddresses 04H 05H and 06H 7 8 1 Left and right volume control 7 9 Power byte at subaddress 07H 7 9 1 Calibration start 7 9 2 DC ...

Page 3: ...AGC Integrated output power muting Audio level meter output Extensive input and output select function Full support of video recorder feature modes 2 GENERAL DESCRIPTION The TDA9605H is a single chip device in a small package that contains all the required functions including the head amplifier to realize the audio FM hi fi stereo system in a VHS video recorder see Fig 1 The device is adjustment f...

Page 4: ...05H 1 7 or 1 8 MHz SAP 21 22 LINOUT LININ TUR DCL DCR HID HID SDA SCL DCFBL 26 25 EMPHL 24 DCL 23 DETL DCFBR EMPHR DCR DETR TUL E1L SAP TUR E1R E2L E2R VCC SAP 41 44 42 43 standby select SUPPLY VCC GND Vref Iref 34 27 29 28 playback record mute recording M E2L E2R HF LFP L DCR R N dub HF LIMITER PEAK HOLD LEVEL DETECTOR PLL CCO 1 7 or 1 8 MHz LEVEL DETECTOR DROPOUT CANCELING HI FI DETECTOR 1 3 or ...

Page 5: ...ar audio output LININ 22 linear audio input DCFBL 23 DC feedback noise reduction connection left EMPHL 24 emphasis noise reduction connection left DCL 25 DC decoupling noise reduction connection left DETL 26 detector noise reduction connection left GND 27 ground Iref 28 reference standard current connection Vref 29 reference voltage connection DETR 30 detector noise reduction connection right DCR ...

Page 6: ...ee Fig 4 Standby mode active or passive see Fig 5 Fig 2 Pin configuration handbook full pagewidth 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 TDA9605H MGR835 DCFBR EMPHR DCR DETR Iref GND DETL DCL EMPHL DCFBL SAP TUNL TUNR CINL CINR EXT1L EXT2L EXT2R AUXR Vref SCL SDA RMHID V CCH GNDH HMSW RECOUT PBIN2 V CC ENVOUT PBIN1...

Page 7: ...0 dB 0 to 15 dB MUTE 0 to 14 dB AUDIO FM PROCESSING HI FI MUTE 47 to 0 dB 0 to 15 dB CINCH EXT1 EXT2 SAP 1 AUX INPUT SELECT INPUT LEFT VOLUME VOLUME LEFT SAP LINOUT linear audio processing LININ TUNER EXT2 MUTE DUB MIX MUTE LEFT EXT2 OUTPUT SELECT OUTPUT SELECT ENVOUT RFCOUT HF ENVELOPE HF envelope STEREO RIGHT STEREO NORMAL TUNER EXT1 SAP MUTE OUTPUT SELECT NORMAL TUNR CINL CINR EXT1L EXT1R EXT2R...

Page 8: ...T INPUT LEFT VOLUME VOLUME LEFT SAP LINOUT linear audio processing record LININ TUNER EXT2 MUTE DUB MIX MUTE LEFT EXT2 OUTPUT SELECT OUTPUT SELECT ENVOUT RFCOUT HF ENVELOPE HF envelope STEREO RIGHT STEREO NORMAL TUNER EXT1 SAP MUTE OUTPUT SELECT TUNR CINL CINR EXT1L EXT1R EXT2R AUXL SAP EXT2L AUXR RECOUT tape volume aux output select line select input select PBIN1 PBIN2 NORMAL NORMAL NORMAL MUTE L...

Page 9: ... rotated correctly when browsing through the pdf in the Acrobat reader white to force landscape pages to be handbook full pagewidth MGR838 TUNL MUTE EXT2 OUTPUT SELECT RFCOUT TUNER EXT1 SAP MUTE OUTPUT SELECT TUNR CINL CINR EXT1L EXT1R EXT2R AUXL SAP EXT2L AUXR line select input select MUTE output select TUNL MUTE TUNR CINL CINR EXT1L EXT1R EXT2R AUXL SAP EXT2L AUXR input select decoder select 0 d...

Page 10: ...connected between these pins The head identification HID signal on pin RMHID selects between the head signals on pins PBIN2 or PBIN1 Head selection is defined as shown in Table 1 The state of the RM control signal on pin RMHID is don t care in the playback mode I2C bus control bits HAC2 HAC1 and HAC0 offer a wide selection of playback amplification to fit different head and head transformer specif...

Page 11: ...RECORD MODE LOW lower than 2 35 V record or record mute mode as defined by I2C bus control HIGH higher than 2 65 V record mute mode The DC bias current on pin RECOUT is changed proportional to the selected recording current for optimizing the performance and minimizing the power consumption for each recording current selected A Boucherot damping circuit is connected between pin HMSW and ground to ...

Page 12: ...l carrier which results in a frequency difference between the left and right channel carrier near to 401 2 kHz This value effectively reduces the crosstalk from hi fi carriers to video colour signal as present during Extended Play EP tape speed NTSC calibration uses a standard HID control signal of 29 97 Hz pulse width 16 683 ms where PAL calibration uses a standard HID control signal of 25 Hz pul...

Page 13: ...ing Switching off and on of the power supply voltage or using the built in passive standby mode results in rising and dropping of the output DC voltages and causes strong disturbances on the output pins The TDA9605H includes three integrated mute switches to block such disturbances so avoiding the need for an external mute circuit Pop free line and RF converter output signals are realized by conne...

Page 14: ...nctional diagram is given in Fig 9 and the timing diagram is shown in Fig 10 Only one ADC input is needed on the microcontroller for reading all the required information During the playback mode the selection between audio level and carrier level information is realized by setting I2C bus control bit EOS see Table 3 The AF envelope output is defined by the signal selection made at the output selec...

Page 15: ...D RM HID ENVOUT SAMPLE AND HOLD SAMPLE SAMPLE HF LEVEL DETECTOR 1 7 or 1 8 MHz carrier HF LEVEL DETECTOR SQUARE ROOT COMPRESSION SQUARE ROOT COMPRESSION td Fig 10 Timing diagram of the envelope output signal handbook full pagewidth MGR844 I2C bus registers HID signal HID period ENVOUT level meter display EOS 0 or AFM 1 EOS 1 and AFM 0 0 1 2 3 HF envelope peak right in period 1 peak right in period...

Page 16: ...evel Bit LOH 0 handbook halfpage 5 0 1 MGR847 2 3 4 40 10 30 20 10 0 ENVOUT output voltage V LINEL and LINER output level dBV Fig 13 AGC output of RF converter handbook halfpage MGR848 RF converter output dBV 3 3 line output dBV 6 8 RF converter output An AGC function is incorporated to avoid overmodulation in the RF converter connected to pin RFCOUT The AGC limits the maximum signal level on the ...

Page 17: ... by mixing together the new and the original sound Continuous user control over amplitude and ratio mix of the auxiliary input signal e g a microphone input and the original hi fi playback sound is possible using the left and right channel volume controls This function is realized inside the IC by connecting the auxiliary input signal pair pins AUXL and AUXR to the left channel volume control and ...

Page 18: ...case automatic subaddress incrementing is disabled 2 It is advised to keep the not used write bits equal to the POR state to accommodate future compatibility 3 You cannot rely upon the state of the not used read bits because their state may change during development NAME ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Write mode Slave byte B8H 1 0 1 1 1 0 0 0 Subaddress byte 00H to 07H not...

Page 19: ...cord mute 3 4 5 6 8 9 5 11 and 12 5 dB mix ratio DOC SHH and DETH System standard NTSC and PAL NTSC Playback head amplifier amplification 48 51 54 57 60 63 66 and 69 dB HAC2 HAC1 and HAC0 Record head amplifier current 12 5 15 17 5 21 25 30 35 42 50 60 71 and 84 mA p p HAC2 HAC1 HAC0 and HRL Normal input level 0 to 14 dB and mute NIL3 NIL2 NIL1 and NIL0 Input select tuner CINCH ext1 ext2 SAP dub mi...

Page 20: ...ormal can be monitored by I2C bus control bit AUTN of the read byte In case automatic selection of the normal audio signal is not required the normal input level control can be set to mute bits NIL3 to NIL0 of the select byte Table 10 Dropout cancelling bit DOC sample and hold high state bit SHH and detector time hi fi bit DETH in the playback mode note 1 Note 1 X don t care Playback head amplifie...

Page 21: ...m Different code settings for the auto calibration circuit assure proper calibration using the standard HID control signal frequency of 29 97 Hz for NTSC mode and 25 Hz for PAL mode After auto calibration is completed bit NTSC enables instant switching between the NTSC and PAL system Table 12 System standard selection bit NTSC Note 1 Power on reset state AFM DOC SHH DETH MODE DESCRIPTION 1 0 0 0 r...

Page 22: ...nt of the selected record mix ratio setting but recording is disabled during the record mute mode as defined by the bits DOC SHH and DETH or the control signal on pin RMHID Table 14 Head amplifier control bits HAC2 HAC1 and HAC0 and head record current low bit HRL in the record mode AFM HAC2 HAC1 HAC0 MODE DESCRIPTION 0 0 0 0 48 dB hi fi detection level equals 13 µV RMS from head 0 0 0 1 51 dB hi ...

Page 23: ...be selected The indicated decoder select function modes are also available during the active standby mode by setting bit STBA 1 Table 15 Decoder output select bits DOS1 and DOS0 Note 1 Power on reset state 7 5 2 HEAD AMPLIFIER RECORD CURRENT RANGE SELECT The default selection of eight recording currents set by bits HAC2 HAC1 and HAC0 of the control byte is extended with four additional low level r...

Page 24: ...OUT Table 18 Input select bits IS2 IS1 and IS0 Notes 1 Power on reset state 2 The dub mix mode is a special selection which supports audio dubbing This video recorder feature enables the recording of the sound signal of the linear audio only see Section 6 9 NIL3 NIL2 NIL1 NIL0 MODE DESCRIPTION 0 0 0 0 0 dB amplification of linear audio of 0 dB note 1 0 0 0 1 1 dB amplification of linear audio of 1...

Page 25: ...ound on tape in the playback mode Except for the mute mode all output select function modes will be overruled and changed to normal Control of normal input level should be set to mute for muting the hi fi sound The state of the auto normal function can be monitored by reading bit AUTN of the read byte NS2 NS1 NS0 MODE DESCRIPTION 0 0 0 input select left plus right channel signal selected by input ...

Page 26: ...le 23 Envelope output select bit EOS Notes 1 X don t care 2 Power on reset state OSN OSR OSL MODE DESCRIPTION 0 0 0 mute mute no selection note 1 0 0 1 left left hi fi channel selected language 1 0 1 0 right right hi fi channel selected language 2 0 1 1 stereo hi fi stereo selected 1 0 0 normal normal signal selected linear audio from pin LININ 1 0 1 mix left mix of hi fi left with normal 1 2 left...

Page 27: ...ction is still operating In combination with the line select function a complete pay TV decoder switching feature is offered via the SCART connector Table 25 Decoder output select bit DOS Note 1 Power on reset state LOS MODE DESCRIPTION 0 output select line output signal is set by output select note 1 1 ext2 line output signal is from input signal on pins EXT2L and EXT2R DOS MODE DESCRIPTION 0 out...

Page 28: ...ALS from logic 0 to logic 1 The use of auto calibration is only needed after power up Power on reset of the supply voltage see Section 6 5 Table 28 Calibration start bit CALS Note 1 Power on reset state The output signal on pin ENVOUT or bit CALR calibration ready and bit CALE calibration error of the read byte can be monitored to check for completion of the calibration CALS MODE DESCRIPTION 0 no ...

Page 29: ...operating note 1 1 test mode test mode for special measurements PORR MODE DESCRIPTION 0 no reset note 1 1 bit POR reset reset of bit POR read byte 7 9 5 HEAD AMPLIFIER DISABLE Bit HPD offers a special setting intended for use with some of the built in test modes and for support of particular applications that do not require use of the integrated head amplifier By setting bit HPD 1 the head amplifi...

Page 30: ...ion STBP STBA MODE DESCRIPTION 0 0 operating standard operating mode full function note 2 0 1 active standby active standby mode reduced power consumption 1 X passive standby passive standby mode minimum power consumption 7 10 1 CALIBRATION READY The completion of calibration is signalled by changing bit CALR from logic 0 to logic 1 Bit CALR remains logic 0 if for some reason a calibration can not...

Page 31: ...ltage dip The I2C bus data bits and auto calibration registers are reset to a pre defined state When reading bit POR 1 it indicates that the internal data bits are found to be in the POR state due to an actual Power on reset or the I2C bus control settings CALE DESCRIPTION 0 not calibrated or calibration result is found correct note 1 1 calibration error encountered during calibration Detecting th...

Page 32: ... 3000 V Ilu prot latch up protection current on Tj 100 C pin HSMW 70 100 mA pin SDA 60 100 mA all other pins 100 100 mA SYMBOL PARAMETER CONDITIONS VALUE UNIT Rth j a thermal resistance from junction to ambient in free air 60 K W SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT Supplies VCC supply voltage VCCS 0 8 1 9 13 2 V VCCS 1 8 1 12 13 2 V VCCH head amplifier supply voltage 4 75 5 5 5 V ICC supp...

Page 33: ...OW for head 2 HID LOW 0 0 6 V for head 1 HID HIGH 1 0 2 35 V record mute RM HIGH for head 2 HID LOW 2 65 3 8 V for head 1 HID HIGH 4 3 5 5 V SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT Line inputs pins SAP TUNL TUNR CINL CINR EXT1L EXT1R EXT2L EXT2R AUXL and AUXR Vi input voltage 9 dBV Ri input impedance 100 130 kΩ Linear audio input pin LININ Vi input voltage 8 dBV Ri input impedance 100 130 kΩ ...

Page 34: ...ls note 3 93 dB RF converter output pin RFCOUT Vo output voltage tuner input signal at normal level 8 dB 9 8 7 dBV high level 8 dBV 4 5 3 1 5 dBV THD total harmonic distortion tuner input signal at normal level 8 dBV 0 03 levels from 8 to 8 dBV 0 2 Vn noise level tuner input signal on zero level dBV note 2 80 dBV Ro output impedance 200 300 Ω Io max output current limiting power mute MUTE 1 1 mA I...

Page 35: ...y time in accordance with VHS specification 70 ms αres f1 frequency response 300 Hz tuner input frequency from 300 to 1000 Hz 0 7 0 2 0 3 dB αres f2 frequency response 10 kHz tuner input frequency from 10 to 1 kHz 3 1 3 9 4 7 dB αres lpf1 audio low pass filter response 20 kHz tuner input frequency from 20 to 1 kHz test 26b 0 5 0 1 0 5 dB αres lpf2 audio low pass filter response 60 kHz tuner input ...

Page 36: ...dB Gbal gain balance between pins PBIN1 and PBIN2 1 0 1 dB αct head to head crosstalk between pins PBIN1and PBIN2 45 dB HF AGC test 5 Vi p p AGC start level peak to peak value playback mode HPD 1 left plus right channel 47 67 94 mV B control bandwidth note 1 10 kHz Left channel band pass filter test 3 αf output voltage ratio f0 400 kHz f0 30 20 dB f0 150 kHz f0 9 6 dB f0 150 kHz f0 9 5 dB f0 250 k...

Page 37: ... 1 7 8 9 µs THD total harmonic distortion test 25c note 2 73 dB td delay between HID control signal and hold status 0 3 µs PLL FM demodulator test 25c Vi sensitivity fFM 150 kHz S N 35 dB 0 3 1 mV THD total harmonic distortion normal fFM 50 kHz 0 05 0 3 maximum fFM 150 kHz 0 2 1 5 S N signal to noise ratio fFM 50 to 0 kHz 54 60 dB αct ch channel crosstalk left or right carrier fFM 0 kHz 80 dB Nois...

Page 38: ...rol signal of 500 Hz on pin RMHID fmod 10 kHz and fFM 50 kHz Audio distortion is measured using a 3 kHz 4th order low pass filter The measured value is corrected with 24 dB in order to calculate the equivalent distortion for the standard NTSC 29 97 Hz HID control signal 3 B 20 Hz to 20 kHz unweighted Envelope output pin ENVOUT Vo output voltage left channel input signal at 1 6 mV RMS 0 6 0 9 1 2 V...

Page 39: ... 42 43 standby select SUPPLY 34 27 29 28 M E2L E2R HF LFP L DCR R N dub HF LIMITER PEAK HOLD LEVEL DETECTOR PLL CCO 1 7 or 1 8 MHz LEVEL DETECTOR DROPOUT CANCELING HI FI DETECTOR 1 3 or 1 4 MHz HF LFP HF AGC M HF LIMITER PLL CCO 1 3 or 1 4 MHz envelope output select record envelope output select playback DCL mute R L PEAK HOLD AUTO MUTE line select output select AUTN AUTN M NOISE SUPPRESSION NOISE...

Page 40: ...ID input signal 14 2 Reference current resistor The requirements for the reference current resistor on pin 28 are R 39 kΩ 2 Temperature coefficient 50 ppm C SIGNAL HID INPUT SIGNAL ONLY HID AND RM INPUT SIGNALS CONDITIONS MIN MAX CONDITIONS MIN MAX HID LOW 0 V 1 5 V LOW 0 V 0 4 V HIGH 3 V 5 5 V HIGH 4 3 V 5 5 V RM grounded LOW 0 V 0 4 V HIGH 4 3 V 5 5 V Fig 15 RMHID input a HID input only b HID an...

Page 41: ...ve bits of the select byte see Table 41 When selecting test modes the normal input level setting is changed as defined by bits NIL3 to NIL0 Calibration may be lost when a not listed test mode is selected LINE OUTPUT LEVEL 1 RESISTOR CONNECTED BETWEEN RESISTOR IN SERIES WITH CAPACITOR CONNECTED BETWEEN PINS 24 AND 23 PINS 32 AND 33 PIN 24 AND GROUND PIN 32 AND GROUND 4 9 dBV 47 kΩ 47 kΩ 3 9 kΩ 4 7 ...

Page 42: ...channel band pass filter with HF AGC off EOS 1 test output on pin ENVOUT notes 1 and 2 1 0 0 1 0 0 test 4 playback mode right channel band pass filter with HF AGC off EOS 1 test output on pin ENVOUT notes 1 and 2 1 0 0 1 0 1 test 5 playback mode HF AGC left channel band pass filter EOS 1 test output on pin ENVOUT notes 1 and 2 1 0 0 1 1 0 test 6 playback mode HF AGC right channel band pass filter ...

Page 43: ...cified PIN SYMBOL VOLTAGE EQUIVALENT CIRCUIT 1 SAP 3 8 V 2 TUNL 3 TUNR 4 CINL 5 CINR 6 EXT1L 7 EXT1R 8 EXT2L 9 EXT2R 10 AUXL 11 AUXR 12 RFCAGC 0 V 13 RFCOUT 3 8 V 14 MUTEC 0 V 15 MUTEL 18 MUTER 16 LINEL 4 5 V VCCS 0 6 V VCCS 1 17 LINER 19 DECL 20 DECR MGR849 73 kΩ 57 kΩ 1 to 11 3 8 V VCC MGR850 100 Ω 500 Ω 12 VCC bit RFCM 180 kΩ 200 Ω 13 VCC 230 µA MGR851 MGR852 100 kΩ 14 15 18 bit MUTE or VCC 7 V...

Page 44: ...4 5 V 22 LININ 3 8 V 23 DCFBL 3 8 V 33 DCFBR 24 EMPHL 3 8 V 32 EMPHR 25 DCL 3 8 V 31 DCR PIN SYMBOL VOLTAGE EQUIVALENT CIRCUIT MGR854 200 Ω 17 7 kΩ 30 kΩ 21 VCC 600 µA 3 8 V 96 4 kΩ MGR855 total 130 kΩ 3 8 V 22 VCC bits NIL2 to NIL0 3 8 V MGR856 bit AFM 23 33 VCC MGR857 240 Ω 24 32 VCC 3 8 V bit AFM MGR858 2 8 kΩ 25 31 VCC 3 8 V ...

Page 45: ...er for VHS hi fi TDA9605H 26 DETL 0 7 V 30 DETR 27 GND 0 V 28 Iref 3 8 V 29 Vref 34 VCC 9 to 12 V PIN SYMBOL VOLTAGE EQUIVALENT CIRCUIT MGR859 26 30 VCC 0 5 V 7 5 kΩ 27 substrate MGR860 200 Ω 28 VCC 20 kΩ 3 8 V from reference generator 3 8 a V 3 8 V 29 VCC MGR861 bit STBA bit STBP MGR862 VCC 34 ...

Page 46: ... 0 7 V 4 3 V recording 36 RECOUT 37 PBIN1 38 HMSW 0 V 4 3 V recording 39 GNDH 0 V 40 VCCH 5 V PIN SYMBOL VOLTAGE EQUIVALENT CIRCUIT signal RM playback or record mute mode GNDH VCC VCCH 35 kΩ 5 Ω GNDH GNDH 35 36 to HF AGC MGR863 VCC VCCH 35 kΩ GNDH GNDH 37 38 bit AFM bit HPD bit DOC bit SHH bit DETH GNDH 39 MGR864 VCCH 40 MGR865 ...

Page 47: ...mplifier for VHS hi fi TDA9605H 41 RMHID 0 to 5 V 42 SDA 0 or 5 V 43 SCL 0 or 5 V 44 ENVOUT 0 V PIN SYMBOL VOLTAGE EQUIVALENT CIRCUIT 3 kΩ MGR866 2 5 V 0 8 V 4 05 V signal RM signal HID 41 VCC 42 MGR867 275 Ω bit ACK I2C bus acknowledge 43 MGR868 275 Ω 1 kΩ 44 VCC test modes 40 µA MGR869 ...

Page 48: ... 10 1 9 9 0 8 1 3 12 9 12 3 1 2 0 8 10 0 o o 0 15 0 1 0 15 DIMENSIONS mm are the original dimensions Note 1 Plastic or metal protrusions of 0 25 mm maximum per side are not included 0 95 0 55 SOT307 2 95 02 04 97 08 01 D 1 1 1 10 1 9 9 HD 12 9 12 3 E Z 1 2 0 8 D e E B 11 c E H D ZD A ZE e v M A X 1 44 34 33 23 22 12 y θ A1 A Lp detail X L A 3 A2 pin 1 index D H v M B bp bp w M w M 0 2 5 5 mm scale...

Page 49: ... major problems To overcome these problems the double wave soldering method was specifically developed If wave soldering is used the following conditions must be observed for optimal results Use a double wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave For packages with leads on two sides and a pitch e larger than or equal to 1 27 mm the...

Page 50: ... and heatsink at bottom version can not be achieved and as solder may stick to the heatsink on top version 3 If wave soldering is considered then the package must be placed at a 45 angle to the solder wave direction The package footprint must incorporate solder thieves downstream and at the side corners 4 Wave soldering is only suitable for LQFP TQFP and QFP packages with a pitch e equal to or lar...

Page 51: ...ry data supplementary data may be published later Product specification This data sheet contains final product specifications Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System IEC 134 Stress above one or more of the limiting values may cause permanent damage to the device These are stress ratings only and operation of the device at these or at any othe...

Page 52: ...tates 811 East Arques Avenue SUNNYVALE CA 94088 3409 Tel 1 800 234 7381 Fax 1 800 943 0087 Uruguay see South America Vietnam see Singapore Yugoslavia PHILIPS Trg N Pasica 5 v 11000 BEOGRAD Tel 381 11 62 5344 Fax 381 11 63 5777 For all other countries apply to Philips Semiconductors International Marketing Sales Communications Building BE p P O Box 218 5600 MD EINDHOVEN The Netherlands Fax 31 40 27...

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