© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
User manual
Rev. 03 — 7 June 2005
53 of 139
Philips Semiconductors
UM10119
P89LPC938 User manual
10. Capture/Compare Unit (CCU)
This unit features:
•
A 16-bit timer with 16-bit reload on overflow
•
Selectable clock (CCUCLK), with a prescaler to divide the clock source by any integer
between 1 and 1024.
•
Four Compare / PWM outputs with selectable polarity
•
Symmetrical / Asymmetrical PWM selection
•
Seven interrupts with common interrupt vector (one Overflow, 2xCapture,
4xCompare), safe 16-bit read/write via shadow registers.
•
Two Capture inputs with event counter and digital noise rejection filter
Table 42:
Real-time Clock Control register (RTCCON - address D1h) bit description
Bit
Symbol
Description
0
RTCEN
Real-time Clock enable. The Real-time Clock will be enabled if this bit is logic 1.
Note that this bit will not power-down the Real-time Clock. The RTCPD bit
(PCONA.7) if set, will power-down and disable this block regardless of RTCEN.
1
ERTC
Real-time Clock interrupt enable. The Real-time Clock shares the same interrupt
as the watchdog timer. Note that if the user configuration bit WDTE (UCFG1.7)
is logic 0, the watchdog timer can be enabled to generate an interrupt. Users
can read the RTCF (RTCCON.7) bit to determine whether the Real-time Clock
caused the interrupt.
2:4
-
reserved
5
RTCS0
Real-time Clock source select (see
).
6
RTCS1
7
RTCF
Real-time Clock Flag. This bit is set to logic 1 when the 23-bit Real-time Clock
reaches a count of logic 0. It can be cleared in software.
