12-6
12-6
CIRCUIT DIAGRAM 1
NC
RESET
NC
7303
K4S641632F
A0
23
A1
24
22
A10|AP
A1
1
3
5
A2
25
A3
26
A4
29
A5
30
31
A6
A7
32
A8
33
A9
34
BA0
20
BA1
21
17
CAS_
CKE
37
CLK
38
CS_
19
2
DQ0
4
DQ1
DQ10
45
DQ1
1
47
DQ12
48
DQ13
50
51
DQ14
DQ15
53
5
DQ2
7
DQ3
DQ4
8
10
DQ5
1
1
DQ6
13
DQ7
DQ8
42
DQ9
44
LDQM
15
36
NC|RFU
40
18
RAS_
UDQM
39
1
14
27
3
9
43
49
28
41
54
6
12
46
52
16
WE_
1M x 16
1M x 16
1M x 16
1M x 16
BANK
SELECT
OUTPUT BUFFER
VSS
VSSQ
TIMING REGISTER
NC
ADDRESS REGISTER
LCKE
BURST
LENGTH
LA
TENCY
&
DECODER
COLUMN
L
WCBR
LCAS
LW
E
REGISTER
COL. BUFFER
LQDM
ROW DECODER
REFRESH COUNTER
ROW BUFFER
LDQM
LW
E
I/O CONTROL
SENSE AMP
LRAS
VDD
VDDQ
LCBR
DA
T
A
INPUT
REGISTER
PROGRAMMING
LRAS
LCBR
14
A
B
C
D
E
F
G
H
I
A
B
C
D
E
F
G
H
I
1300 C14
1301 I10
1302 I14
1305 I8
1810 I1
1811 I1
2300 B1
2301 B1
2302 A4
2303 A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
13
2304 B4
2305 B4
2306 A8
2307 A8
2308 A8
2309 B8
2310 B8
2311 B8
2312 B8
2313 B9
2315 D9
2316 D9
2317 D9
2318 D10
2319 D10
2320 D11
2321 A9
2322 A10
2323 E3
2330 I12
2331 H10
2332 H10
2334 H10
2335 H11
2336 H11
2337 H11
2338 H11
2339 E13
2340 A4
CS
CAS
2341 A4
2342 A4
2343 A5
2344 A5
2345 A5
2346 A5
2347 A6
2348 A6
2349 A6
2350 A7
2351 A7
2352 A7
2353 A7
2354 A8
2355 A8
2356 A8
2357 I8
2358 I8
2359 I9
2361 B14
2362 D12
2363 D12
2364 D12
CVBS
2365 D12
3300 A3
3301 B5
3302 B9
3303 B9
3304 B9
3305 B10
3306 B10
3307 B10
3308 B10
3309 B8
3311 B10
3314 D8
3315 D9
3316 D9
3317 D10
3318 D10
3319 D11
3320 E8
3321 E9
3322 E8
3323 E8
3324 E9
RAS
CKE
B_Cr
3325 E8
3326 E9
3327 E8
3328 E9
3329 E8
3330 E9
3331 F8
3332 F9
3333 F8
3334 F9
3335 F8
3336 F9
3337 F8
3338 F9
3339 F8
3340 F9
3345 H9
3346 H8
3347 I8
3350 I10
3351 I11
3352 H8
3353 G9
3354 H8
3355 H8
3362 B12
3364 B12
3366 B13
3367 A14
3368 B13
3369 B14
3370 B13
3371 I4
3372 I5
3373 C11
4301 A11
WE
C_R_Cb
4302 A11
4303 C4
4304 C4
4305 A11
4310 I9
4810 I1
4811 I1
4812 I1
4813 H2
5300 A5
5301 A5
5302 D11
5303 D11
5304 D11
5305 D11
5306 B1
5307 F10
5310 H9
7300 B2
7301 A3
7302 E6
7304 I11
7305 A9
7310 I5
7362 B13
7810 F1
EN
AM29F040B
7810
D
10K
3372
100n
2353
3354
10R
D
V
100n
2315
3u3
5310
7305
LF27CDT
1n
2359
100n
2332
100n
2306
10R
3353
+2V7
CX-11F
1305
27MHz
5306
2343
100n
for ’pm’ (scart) version only
25V
10u
2355
+5D
Y_G_Y
D
D
3324
33R
15p
2307
100n
2323
3322
68R
V
1K0
3368
FMN
1302
1
2
3
4
+12V
6
SDA
5
VCC
8
VSS
4
WC_
7
V
D
7304
M24C01
E0
1
E1
2
E2
3
SCL
4813
2305
10u
25V
100n
2300
2356
10u
25V
4302
10K
3366
7362
BC847BW
GND
IN
OUT
D
D
D
3301
4K7
V
+5D
100n
2304
2348
100n
25V 10u
2303
D
4305
2322
470n
2330
100n
100n
2341
V
V
3340
10R
V
V
+3V3
+5D
75R
3316
2340
100n
100n
2350
2311
10u 25V
2352
100n
270R
3315
V
osc
3326
33R
100n
2345
D
18K
3364
3306
4K7
V
100n
82p
2362
2336
33R
3321
2364
82p
V
3334
10R
5301
3309
33R
M
4K7
3371
100n
2342
1K
3350
4K7
3304
3314 47R
+5D
osc
+5D
+3V3
2320
100p
D
V
V
3302
4K7
E_
28
G_
10
9
14
13
15
RB_
12
RP_
37
VCC
27
VSS1
46
VSS2
11
W_
DQ0
31
DQ1
34
DQ10
36
DQ11
39
DQ12
41
DQ13
43
DQ14
45
DQ15|A-1
33
DQ2
35
DQ3
38
DQ4
40
DQ5
42
DQ6
44
DQ7
30
DQ8
32
DQ9
26
3
A13
2
A14
1
A15
48
A16
17
A17
16
A18
23
A2
22
A3
21
A4
20
A5
19
A6
18
A7
8
A8
7
A9
47
BYTE_
29
M29F800AT
7300
25
A0
24
A1
6
A10
5
A11
4
A12
100n
2346
4811
100n
2308
331
1
4K7
3317
75R
OSC
4810
2302
100n
D
osc
100K
3346
33R
3320
3332
10R
+3V3
+3V3
D
V
100p
2318
+2V7
D
10R
3338
2331
100n
+3V3
V
D
3305
4K7
D
4K7
3303
47R
V
M
3355
3337
10R
2316
100n
33R
3328
33R
3325
D
3339
10R
220R
3369
4310
3331
10R
+5D
4303
3351
1K
3367
1K0
5307
V
2363
82p
3319
75R
3347
68R
+3V3
10R
3330
22p
2313
4304
D
3336
3335
10R
D
10R
4K7
3308
33K
100n
2310
3370
2u2
5305
OE_
32
VCC
16
VSS
31
WE_
D
8
A4
7
A5
6
A6
5
A7
27
A8
26
A9
22
CE_
13
DQ0
14
DQ1
15
DQ2
17
DQ3
18
DQ4
19
DQ5
20
DQ6
21
DQ7
24
12
A0
11
A1
23
A10
25
A11
4
A12
28
A13
29
A14
3
A15
2
A16
30
A17
1
A18
10
A2
9
A3
2351
100n
osc
25V
2337
10u
D
D
D
100n
2335
2334
100n
osc
+3V3
D
10R
3345
2339
15p
2358
10p
D
22n
2361
1301
FMN
1
2
3
4
5
6
7
8
V
+3V3
D
V
75R
3318
100p
2319
5300
4K7
3307
YUV_1|VREF
107
YUV_2|CDAC
108
YUV_3|COMP
109
YUV_4|RSET
110
113
YUV_5|YDAC
YUV_6|VDAC
114
YUV_7|CAMIN3
115
V
184
VSS_23
VSS_24
192
200
VSS_25
VSS_26
208
VSS_3
26
34
VSS_4
43
VSS_5
52
VSS_6
VSS_7
60
67
VSS_8
VSS_9
76
118
VSYNC#|CAMIN6
49
XIN
50
XOUT
YUV_0|CAMIN2
106
104
VSS_1
8
84
VSS_10
VSS_1
1
91
98
VSS_12
VSS_13
103
11
2
VSS_14
VSS_15
120
129
VSS_16
VSS_17
138
147
VSS_18
VSS_19
156
17
VSS_2
163
VSS_20
VSS_21
171
177
VSS_22
VEE_10
VEE_1
1
148
VEE_12
157
159
VEE_13
VEE_14
164
VEE_15
183
193
VEE_16
VEE_17
201
18
VEE_2
VEE_3
27
VEE_4
59
68
VEE_5
VEE_6
75
92
VEE_7
99
VEE_8
VEE_9
31
TDMTSC#
25
TDMX|RSEL
33
TSD0|SEL_PLL0
36
TSD1|SEL_PLL1
TSD2
37
TSD3
38
32
TWS|SEL_PLL2
9
VCC_1
VCC_2
35
44
VCC_3
VCC_4
83
121
VCC_5
VCC_6
139
VCC_7
172
1
VEE_1
130
199
LWRHL#
198
LWRLL#
39
MCLK
42
NC_1
48
NC_2
116
PCLK2XSCN|CAMIN4
117
PCLKQSCN|CAMIN5
47
RBCK
24
RESET#
45
RSD
46
RWS
41
SPDIF|PLL3
40
TBCK
29
TDMCLK
28
TDMDR
30
TDMFS
LD1
179
LD10
190
191
LD11
194
LD12
LD13
195
196
LD14
LD15
197
180
LD2
LD3
181
LD4
182
185
LD5
LD6
186
187
LD7
LD8
188
189
LD9
LOE#
170
21
LA19
LA2
206
22
LA20
23
LA21
LA3
207
2
LA4
3
LA5
4
LA6
5
LA7
6
LA8
7
LA9
LCS0#
173
LCS1#
174
LCS2#
175
LCS3#
176
178
LD0
143
HRDQ#|AUX4_0
145
HRST#|AUX3_5
119
HSYNC#|CAMIN7
149
HWR#|DCI_CLK
142
HWRQ#|DCI_REQ#
LA0
204
LA1
205
10
LA10
11
LA11
12
LA12
13
LA13
14
LA14
15
LA15
16
LA16
19
LA17
20
LA18
HD13|SP
137
HD14|SQSI
140
HD15|IR
141
HD1|DCI1
123
124
HD2|DCI2
125
HD3|DCI3
126
HD4|DCI4
127
HD5|DCI5
128
HD6|DCI6
131
HD7|DCI7
132
HD8|DCI_FDS#
133
HD9|SQSO
151
HIOCS16#|AUX3_4
146
HIORDY|AUX3_3
144
HIRQ|DCI_ERR#
150
HRD#|DCI_ACK#
73
DMBS0
74
DMBS1
70
DOE#|DSCK_EN
101
DQM
72
DRAS#
102
DSCK
71
DWE#
HA0|AUX4_2
154
HA1|AUX4_3
155
HA2|AUX4_4
158
152
HCS1FX#|AUX3_7
153
HCS3FX#|AUX3_6
HD0|DCI0
122
134
HD10|SQSK
135
HD11|IRQ
HD12|C2PO
136
DCLK
105
100
DCS0#
97
DCS1#
53
DMA0
54
DMA1
DMA10
65
DMA11
66
55
DMA2
56
DMA3
57
DMA4
58
DMA5
DMA6
61
DMA7
62
DMA8
63
DMA9
64
DB1
78
DB10
89
90
DB11
93
DB12
DB13
94
95
DB14
DB15
96
79
DB2
DB3
80
81
DB4
82
DB5
DB6
85
86
DB7
DB8
87
88
DB9
69
DCAS#
111
AD|EE
160
AUX_0
161
AUX_1
162
AUX_2|IOW#
165
AUX_3|IOR#
AUX_4
166
167
AUX_5
168
AUX_6
169
AUX_7
51
A
VEE
202
CAMIN0
203
CAMIN1
77
DB0
25V
10u
7302
D
2338
3
4
5
6
7
8
9
3352
10R
FMN
1300
1
10
2
100p
2317
BC847BW
7310
1K
3373
15p
2312
+12V
100n
2349
10K
33R
3323
3362
25V
2301
10u
10p
2357
5304 2u2
2347
100n
2
4
5
OUTP
1
GND
3
INP
470n
2321
3300
2K2
2354
10u
25V
+5D
3327
D
33R
10R
10R
3333
+12V
3329
V
4812
2
82p
2365
1
2
EH-B
1811
1
1810
EH-B
D
5303 2u2
4301
2u2
5302
2309
100n
2344
100n
I2C_CLK_AD
CVBS
I2C_DATA_AD
LA20
CHG_RST
TRAY_IRQ
FRONT_IRQ
I2C_CLK_AD
I2C_DATA_AD
I2C_DATA_AD
27Mhz
I2C_CLK_AD
c_det
CARD_ON
CARD_ON
LA(1:19)
LD(0:7)
LCS3
L0E
LWE
LA21
LCS2
LWE
RST
CHG_RST
TRAY_RST
27MHz
SP_EN
MUTE_AV
LD(2)
LD(1)
LD(0)
LA0
LA(1)
LA(10)
LA(11)
LA(12)
LA(13)
LA(14)
LA(15)
LA(16)
LA(17)
LA(2)
LA(3)
LA(4)
LA(5)
LA(6)
LA(7)
LA(8)
LA(9)
LD(0)
LD(1)
LD(2)
LD(3)
LD(4)
LD(5)
LD(6)
LD(7)
LA(18)
LA(19)
LA(18)
LA(7)
LA(8)
LA(9)
LA(10)
LA(11)
LA(12)
LA(13)
LA(14)
LA(15)
LA(16)
LA(17)
LA(18)
LA(19)
LD(7)
LD(6)
LD(5)
LD(4)
LD(3)
LA(8)
LA(7)
LA(6)
LA(5)
LA(4)
LA(3)
LA(2)
LA(1)
LWE
RST
L0E
LA0
LA(1)
LA(2)
LA(3)
LA(4)
LA(5)
LA(6)
DMA(7)
TRAY_RST
SCART0
+5V
LA(19)
LA(18)
LA(17)
LA(16)
LA(15)
LA(14)
LA(13)
LA(12)
LA(11)
LA(10)
LA(9)
TRAY_IRQ
FRONT_IRQ
+V
+3V3_SENSE
LCS3
LCS2
TBCLK
RBCLK
RWS
TWS
DMA(4)
DMA(5)
DMA(6)
DMA(7)
DMA(8)
DMA(9)
DB(0)
DB(1)
DB(2)
DB(3)
DB(4)
DB(5)
DB(6)
DB(7)
DB(8)
DB(9)
DB(10)
DB(1
1)
DB(12)
DB(13)
DB(14)
DB(15)
27Mhz
HRD
HWR
HIORDY
HCS16
HIRQ
HA0
HA1
HA2
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
DMA(0)
DMA(1)
DMA(10)
DMA(1
1)
DMA(2)
DMA(3)
+5D
DMA(0)
DMA(1)
DMA(2)
DMA(3)
DMA(4)
DMA(5)
DMA(6)
DMA(8)
DMA(9)
DMA(10)
DMA(11)
BA0
BA1
BA0
BA1
LD(3)
LD(4)
LD(5)
LD(6)
LD(7)
RBCLK
RSD
RWS
DIG_BUF
TBCLK
TDMCLK
TDMDR
TDMFS
TSD0
TSD1
TSD2
TWS
+5D
MCLK
+5D
+5D
+V
MUTE_AV
+P
DB(0)
DB(1)
DB(10)
DB(11)
DB(12)
DB(13)
DB(14)
DB(15)
DB(2)
DB(3)
DB(4)
DB(5)
DB(6)
DB(7)
DB(8)
DB(9)
HCS1
HCS3
SP_RST
IDE_RST
SCART0
DAC_RST
LA0
LA20
LA21
LD(0)
LD(1)
LD(2)
+5D
7301
NCP301LSN45
3139 113 3511pt 3 dd wk316
T
o
A
V Board
To Front
Display
To 5DTC Control
Summary of Contents for MX5500D/21S
Page 58: ...8239 210 93414 3139 113 3494pt4 dd wk0315 PART B 8 13 8 13 SUPPLY BOARD CHIP LAYOUT PART B ...
Page 64: ...3104 213 3525 bl132 2 dd 19 11 02 PART B 8 19 8 19 AMPLIFIER BOARD BOTTOM VIEW PART B ...
Page 66: ...3104 213 35254 bl132 1 dd 19 11 02 PART D 8 21 8 21 AMPLIFIER BOARD TOP VIEW PART D ...
Page 77: ...BOTTOM VIEW PART A 9 8 9 8 PART A ...
Page 78: ...BOTTOM VIEW PART B 9 9 9 9 PART B ...
Page 79: ...9 10 9 10 BOTTOM VIEW PART C PART C 2 chip cap 4 7nF ...
Page 80: ...9 11 9 11 BOTTOM VIEW PART D PART D ...
Page 81: ...9 12 9 12 BOTTOM VIEW PART E PART E ...
Page 82: ...9 13 9 13 BOTTOM VIEW PART F PART F ...
Page 83: ...9 14 9 14 BOTTOM VIEW PART G PART G ...
Page 84: ...9 15 9 15 BOTTOM VIEW PART H PART H ...
Page 92: ...10 5 10 5 Exploded view 5DTC mechanic for orientation only ...
Page 106: ...12 2 12 2 BOTTOM VIEW COMPONENT LAYOUT ...
Page 107: ...12 3 12 3 TOP VIEW SMD COMPONENT LAYOUT PART A PART B ...
Page 108: ...PART A 12 4 12 4 TOP VIEW SMD COMPONENT LAYOUT PART A ...
Page 109: ...PART B 12 5 12 5 TOP VIEW SMD COMPONENT LAYOUT PART B ...
Page 115: ...13 1 13 1 EXPLODED VIEW MAIN UNIT mx5500D Exploded view 3139 119 35120 dd wk315 ...