MAIN BOARD
TABLE OF CONTENTS
Internal IC Diagram ..........................................................8-1
Circuit Diagram (Top Left) ................................................ 8-4
Circuit Diagram (Top Right) .............................................. 8-5
Circuit Diagram (Bottom Left) ........................................... 8-6
Circuit Diagram (Bottom Right) ........................................ 8-7
PCB Layout Top View ....................................................... 8-8
PCB Layout Bottom View ................................................. 8-9
Parts List ..........................................................................8-10
8-1
8-1
STA308 INTERNAL IC DIAGRAM
STA505 INTERNAL IC DIAGRAM
OUT1A/B
OUT2A/ B
OUT3A/ B
OUT 4A/B
OUT 5A/B
OU T6 A/B
OUT 7A/B
OUT8A/B
LRCKI
BICKI
SD I12
SD I34
SDI56
SDI78
SA
SE R I A L
DA T A
IN
I
2
C
CHAN NEL
MAPPING
VARI ABLE
OVER-
SAMPLING
TR EBLE,
BASS , EQ
(BIQUA D S )
VOLUME
LIMITING
SDO78
SDO 12
SDO3 4
SDO56
OVER SAM
PLING
VARIABL E
DO WN -
SAMPLING
PO WER
DOWN
P WDN
EAPD
PLL
PLLB
XTI
C KOUT
SCL
SDA
L RCKO
BICKO
MVO
S ERIAL
DA T A
OUT
SYSTEM
CONTRO L
SYSTEM TIMING
DDX
L18 22 H
L19 22 H
C30
1 F
C20
100nF
C99
100nF
C101
100nF
C107
100nF
C106
100nF
C23
470nF
C55
1000 F
C21
100nF
C58
100nF
C58
100nF
R57
10K
R59
10K
R63
20
R98
6
R100
6
C53
100nF
C60
100nF
C31
1 F
C52
330pF
R104
20
C109
330pF
15
M3
IN1A
IN1A
IBIAS
CONFIG
PWRDN
PWRDN
FAULT
TRI-STATE
TH_WAR
TH_WAR
+3.3V
IN1B
VDD
VDD
VSS
VSS
VCC
SIGN
VCC
SIGN
GND-Reg
GND-Clean
IN2A
IN1B
IN2A
IN2B
PROTECTIONS
&
LOGIC
REGULATORS
29
23
24
25
27
26
28
30
21
22
33
34
35
36
M2
M5
M4
17
16
OUT1A
GND1A
OUT1A
VCC
1A
14
12
10
11
OUT1B
GND1B
OUT1B
VCC
1B
13
L113 22 H
L112 22 H
C32
1 F
+VCC
C108
470nF
C33
1 F
7
M17
M15
M16
M14
8
9
OUT2A
GND2A
OUT2A
VCC
2A
6
4
2
3
OUT2B
GND2B
OUT2B
VCC
2B
5
19
31
20
GNDSUB
1
IN2B
32
C110
100nF
C111
100nF
R103
6
R102
6