
8-7
ES3880 CIRCUIT
8-7
PROCESSOR INTERFACE
AUX
SCREEN DISPLA
Y
SERIAL
INTERF
TDM INTERFACE
HUFFMAN
DRAM DMA
CONTROLLER
ON SCREEN
DISPLAY
VIDEO OUTPUT
MPEG
PROCESSOR
512x32 SRAM
2Kx32 ROM
DRAM INTERF
DECODER
RISC
PROCESSOR
64x32 ROM
32x32 SRAM
REGISTERS
AUDIO
&
E
F
1601 D1
2201 E9
2206 F9
2210 F9
2223 A3
2235 B3
2258 F9
2268 D1
2270 B1
2271 E1
2272 F1
2273 C1
2276 C2
2277 B2
2279 D1
2280 C9
2281 C9
2282 C9
3204 C3
3205 C8
3206 D4
3207 C4
3208 C3
3209 D3
3210 E3
3211 F3
3213 B9
Address b
us (18X)
Data Bus (8X)
Data bus (16X)
Address b
us (9X)
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
A
B
C
D
To servo uP
&
From front uP to ES3880
5V
3214 B9
3217 B8
3228 A8
3270 B2
3271 B2
3272 B2
3273 B8
3274 B8
3275 B8
3276 B2
5205 B3
5207 E9
5212 A3
5213 D9
7201 B4
7202 A6
7203 F6
7205-A F2
7205-B E1
7205-C E2
7205-D F2
7205-E D2
7205-F D1
O/P enable
Column
write
Row
EPROM
DRAM
Video Reset
To ES3883 LD(7:0)
ES3883 select
5V
5V
&
&
74HC04D
3
7
14
4
5us
6ms
85ms
Chip enable
O/P enable
&
VCC2
74HC04D
7205-D
9
7
14
8
3211 220R
VCC1
11
12
13
1601
1
10
3205
22K
100R
3270
7205-B
5207
4K7
3206
2271
100p
100n
2201
VCC8
5213
100p
2280
100p
2268
2223
100n
4K7
100p
2276
100R
3272
3228
3271
100R
VCC7
3273 220R
100p
2281
3213
22K
100n
2235
3217
VCC
32
1
VPP
VSS
16
22K
5
A7
27
A8
26
A9
E_
22
G_
24
31
P_
Q0
13
Q1
14
Q2
15
Q3
17
Q4
18
Q5
19
Q6
20
Q7
21
12
A0
11
A1
23
A10
25
A11
4
A12
28
A13
29
A14
3
A15
2
A16
30
A17
10
A2
9
A3
8
A4
7
A5
6
A6
7202
M27C2001
VCC7
3275 220R
2282
10n
VCC1
YUV6
38
YUV7
39
220R
3209
VDD3
51
VPP
81
VSS1
100
VSS2
30
VSS3
50
VSS4
80
VSYNC
40
YUV0
32
YUV1
33
YUV2
34
YUV3
35
YUV4
36
YUV5
37
LD4
59
LD5
60
LD6
61
LD7
62
LOE_
64
L
WR_
63
PCLK
44
PCLK2X
43
RAS_
2
RESET_
29
TDMCLK
96
TDMDR
97
TDMFS
98
VDD1
1
VDD2
31
LA17
87
LA2
70
LA3
71
LA4
72
LA5
73
LA6
74
LA7
75
LA8
76
LA9
77
LCS0_
67
LCS1_
66
LCS3_
65
LD0
55
LD1
56
LD2
57
LD3
58
DB
US5
18
DB
US6
19
DB
US7
20
DB
US8
21
DB
US9
22
D
WE_
3
HSYNC
41
LA0
68
LA1
69
LA10
78
LA11
79
LA12
82
LA13
83
LA14
84
LA15
85
LA16
86
DA
5
9
DA
6
10
DA
7
11
DA
8
12
DA9|DOE_
92
DB
US0
13
DB
US1
14
DB
US10
23
DB
US11
24
DB
US12
25
DB
US13
26
DB
US14
27
DB
US15
28
DB
US2
15 16
DB
US3
DB
US4
17
ATFS|SEL-PLL1
91
AUX0
45
AUX1
46
AUX2
47
AUX3
48
AUX4
49
A
UX5
52
A
UX6
53
A
UX7
54
CAS_
99
CPUCLK
42
DA
0
4
DA
1
5
DA
2
6
DA
3
7
DA
4
8
ES3880
7201
ACLK
88
AIN
93
AOUT|SEL-PLL0
89
ARCLK
94
ARFS
95
ATCLK
90
8
9
100u
2258
14
15
16
17
18
19
2
20
21
22
3
4
5
6
7
4K7
3207
11
NC2
12
NC3
15
30
NC4
27
OE_
RAS_
14
UCAS_
28
VCC1
1
VCC2
6
VCC3
20
VSS1
21
35
VSS2
40
VSS3
WE_
13
32
I|O11
33
I|O12
34
36
I|O13
37
I|O14
I|O15
38
I|O16
39
I|O2
3
I|O3
4
I|O4
5
I|O5
7
8
I|O6
9
I|O7
I|O8
10
I|O9
31
LCAS_
29
NC1
7203
MSM514265C
A0
16
A1
17
A2
18
19
A3
A4
22
23
A5
A6
24
A7
25
A8
26
I|O1
2
I|O10
1
7
14
2
+5V
7205-A
74HC04D
4K7
3208
VCC7
VCC1
5205
2210
100n
74HC04D
7205-F
13
7
14
12
100n
2206
+5V
VCC7
+5V
VCC7
+5V
3276
100R
100p
2272
VCC8
100p 2273
100n
2279
VCC7
5212
3210 220R
VCC7
6
VCC2
7205-C
74HC04D
5
7
14
VCC3
VCC8
3204
4K7
100p 2277
10K
3214
VCC8
220R
3274
2270
100p
7205-E
74HC04D
11
7
14
10
AGND
CD10_RST
IIS_SCLK
IIS_WCLK
IIS_DATA
DSA_S
DSA_D
DSA_A
SDA
SILD
SICL
RAB
LA(10)
LA(11)
LA(12)
LA(13)
LA(14)
LA(15)
LA(17)
LA(16)
AUX5
VDD3
LA(0:17)
DSA_STB
DSA_STB
VCC2
LD(7)
LD(0:7)
IIS_DATA
IIS_WCLK
IIS_SCLK
LEFT
RIGHT
DSA_ACK
DSA_STB
DSA_DAT
YUV(1)
YUV(2)
YUV(3)
YUV(4)
YUV(5)
YUV(6)
YUV(7)
DA(0:8)
DBUS(0:15)
RSTOUT#
DSA_DAT
DSA_ACK
LD(7)
LD(6)
LD(5)
LD(4)
LD(3)
LD(2)
LD(1)
LD(0)
LA(0)
LA(1)
LA(2)
LA(3)
LA(4)
LA(5)
LA(6)
LA(7)
LA(8)
LA(9)
DB
US(6)
DB
US(7)
DB
US(8)
DB
US(9)
HSYNC
LA(0)
LA(1)
LA(10)
LA(11)
LA(2)
LA(3)
LA(4)
LA(5)
LA(6)
LA(7)
LA(8)
LA(9)
LCS1#
LD(0)
LD(1)
LD(2)
LD(3)
LD(4)
LD(5)
LD(6)
135M10
PCLKCSCN
VDD3
VDD3
VSYNC
YUV(0)
DB
US(15)
DB
US(1)
DB
US(2)
DB
US(3)
DB
US(4)
DB
US(5)
DB
US(6)
DB
US(7)
DB
US(8)
D
A(0)
D
A(1)
D
A(2)
D
A(3)
D
A(4)
D
A(5)
D
A(6)
D
A(7)
D
A(8)
DB
US(0)
DB
US(1)
DB
US(10)
DB
US(11)
DB
US(12)
DB
US(13)
DB
US(14)
DB
US(15)
DB
US(2)
DB
US(3)
DB
US(4)
DB
US(5)
LR
AUDIOCLK
BCLK
AUDATA
LA(12)
LA(13)
LA(14)
LA(15)
LA(16)
LA(17)
AIN
ARCLK
ARFS
YUV(0:7)
YUV(0:7)
D
A(0)
D
A(1)
D
A(2)
D
A(3)
D
A(4)
D
A(5)
D
A(6)
D
A(7)
D
A(8)
DB
US(0)
DB
US(9)
DB
US(10)
DB
US(11)
DB
US(12)
DB
US(13)
DB
US(14)
& PROVISION ON THE LAYOUT
3139 118 54470 ...88170 sh1 ... 3448 pt 1 dd wk107
www.freeservicemanuals.info
1/3/16
Published in Heiloo, Holland.
Summary of Contents for FW-V720
Page 48: ...8 6 8 6 MPEG 01B BOARD LAYOUT www freeservicemanuals info 1 3 16 Published in Heiloo Holland ...
Page 69: ...10 3 Service Position www freeservicemanuals info 1 3 16 Published in Heiloo Holland ...
Page 70: ...10 4 Wiring www freeservicemanuals info 1 3 16 Published in Heiloo Holland ...
Page 80: ...Technical remarks 10 14 www freeservicemanuals info 1 3 16 Published in Heiloo Holland ...