5-3
5-3
OPEN
CLOSE
Notic: SE == SERVO; DR == DRIVER
HOLD
C117 is not populate
BCLKE
BCLK
A22
DOOR_SW
A4
D19
D30
D27
A10
A6
SCL0
LCD_DATA
SDWE
A3
A1
D25
RW
SDUDQM
A12
A15
D28
SDLDQM
A21
D18
FLASH_CS0
D20
SDRAS
D23
D26
A17
A9
A11
FLASH_CS1
A5
D17
LCD_SCL
A16
D31
D29
A14
LCD_CS
A7
A2
SDA0
A13
D24
OEB
A18
SDCAS
D16
D21
A19
RESUME
LCD_RS
POWER_OFF
A8
D22
A20
SDWE
SE_DATA
SCL0
LCD_DATA
BCLK
RW
STATUS
SE_RESET
LCD_CS
SDRAS
LCD_RS
DAC_BCLK
A[1:22]
DAC_DATA
DSP_CLK
DSP_PLAY
SDRAM_CS1
POWER_ON
SDA0
D[16:31]
OEB
DE_DC_IN
SE_EF
POWER_OFF
DR_MUTE
/RESET
SDLDQM
BCLKE
SDA2
SE_CFLG
DAC_LRCK
SDCAS
SDUDQM
SE_BLCK
LCD_SCL
AMP_MUTE
FLASH_CS0
SE_LRCK
SCL2
moto_start
RESUME
VDD_1V8
2V8
DSP_VCC
VDD_1V8
DSP_VCC
R44
100R
C5
3
680P
/9
7
R4
9
100
K
R46
10K
L4
270uH
FB13
C52
1.5nF
R103
100R
R8
1K
C
118
0.
1uF
C5
5
10nF
R101
100R
R42
100R
C59
0.1uF
C4
7
1nF
C58
0.1uF
C
114
1n/
5
6
R39
10K
R40
100R
S3
SW SPTT
4
2
1
3
R72
100R
C57
1uF
FB12
R45
100R
C4
9
0.
01uF
R4
8
100K
R43
100R
C4
8
1n/
106
IC6
MCF5249
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
83
scl
_Q
S
P
ickl
cs0
a21
a11
a10
a9
a18
a17
bcLk_gp10
scl
kout-gp15
bcl
ke
sda_Q
S
P
idi
n
data24
a22
sdudqm
ef_gp19
data25
data26
data27
PAD_
G
ND1
data28
data29
sdat
a3_gp56
data30
buf
enb1_gp57
data31
CORE_
VDD1
a13
CORE_
GND1
a23
a14
a15
a16
PAD_
VDD1
a19
a20
te
s
t2
sdr
amcs1
sdat
a1bs1_gp9
sdr
as
sdcas
sdw
e
sdl
dqm
gp5
QSPo
c
s0_gp29
QSP
odout
_gp26
gp6
data21
data19
QSPics2_gp21
data20
data22
data18
data23
data17
PAD_
VDD3
data16
cflg_gp18
ebuout
1_gpo36
CORE_
GND3
ebuin3_adin0_gpi38
ebuin2_gpi37
CORE_
VDD3
scl2_gp3
rs
ti
tout1/adout/gpo35
lrck2_gp44
oe
sda2_gp55
sdatao2_gpo41
sclk2_gp48
PAD_
G
ND3
te
s
t3
sdatao1_gp25
lrck1
lrck4_gp46
sdatai4_gpi42
sclk1
sclk4_gp50
ta_gp20
sdatai1
ebuin1_gpi36
PL
L
GGND
P
LLP
G
N
D
PL
L
PVDD
P
LLC
G
N
D
P
LLC
V
D
D
idediow_gp14
cr
in
idedior_gp13
io
rd
y_gp16
cl11_gpo39
cl16_gpo42
xt
ri
m
_gpo38
tr
st
_dscl
k
CORE_
VDD5
rw_
b
tm
s_bkpt
CORE_
G
ND5
tc
k
PAD_
GND5
dbdcpst
3_gp62
cnpst
cl
k_gp63
dbdcpst
1_gp60
PAD_
VDD5
dbdcpst
2_gp61
dbdcpst
0_gp59
td
i_dsi
te
s
t0
tin0_gpi33
hi
z_b
dbdcddat
a3_gp4
tout0_gpo33
dbdcddat
a1_gp1
dbdcddat
a2_gp2
cts2_adin3_gpi31
dbdcddat
a0_gp0
rxd2_adin2_gpi28
tdo_dso
rts2_gpo31
sdat
ai
3_gpi
41
cts1_gpi30
txd2_gpo28
rt
s1_gpo30
ebuin4_adin1_gpi39
txd1_gpo27
rxd1_gpi27
cs1_gp58
CORE_
G
ND7
a1
tin1_gp23
a2
a3
PAD_
G
ND7
a4
a6
a5
a8
a7
CORE_
VDD7
a12
te
s
t1
PAD_
VDD7
P
LLG
V
D
D
FB11
C5
6
1n/
141
C5
4
1n
C51
4.7uF
R41
100R
R102
100R
R1
100
K
C60
0.1uF
S1
S2
C
117
100
P
C5
0
1n/
8
5
C61
1uF
LCD_DATA
LCD_CS
KEY1
PLAY
LCD_SCL
2V8
C112
0.1uF
RN2
10K
C2
47uF
RN4
10K
R36
10K
RN5
10K
R54
47R
RN3
10K
J13
CON26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
U2
AX3025B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
CS
NC
WR
DATA
VSS
OSCO
OSCI
VLCD
VDD
NC
NC
NC
COM0
COM1
COM2
COM3
NC
NC
NC
NC
NC
NC
NC
NC
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
R38
47R
RN1
10K
R51
10K
R306
27K
KEY7
ALBUM+
KEY3
SKIP-
KEY8
ALBUM-
R307
47K
KEY4
SKIP+
R303
8.2K
R305
15K
KEY9
PROG
KEY5
EQ
R301
1K8
KEY2
STOP
R300
1K5
KEY J1
CON26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
KEY6
MODE
R304
10K
KEY1
PLAY/P
AUSE
R302
3K
CIRCUIT DIAGRAM - PART 3
