Philips EM7U LCOS Service Manual Download Page 55 | Manualshive

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LVDS RECEIVER (Figure 48)

Picture data from the SSB is transmitted to the MSB (Main Scaler Board) via the LVDS (Low
Voltage transmission system) to IC 7537. The LVDS receiver has four data lines and one
clock line.

The IC is switched On or Off by the Scaler IC via the LVDS_PWR_DOWN_n line connected
to Pin 25.  When AV1, AV2, or the Front (Side) input is selected, the Scaler IC switches Pin
25 High to switch IC 7537 On.  The Signal from the Eagle is output to the Scaler as digital Y
and UV.  Vertical and Horizontal Sync is output on Pin 54 and 55.  The Clock data signal is
output on Pin 26.  The DE_EMG line goes High when the IC is switched On to signal the
Scaler IC that data is present from this IC.

Page 52

FIGURE 48 - LVDS RECEIVER

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Summary of Contents for EM7U LCOS

Page 1: ... BOX 14810 KNOXVILLE TN 37914 1810 PHONE 865 521 4397 FAX 865 521 4818 EMAIL TECHNICAL TRAINING PHILIPS COM P H I L I P S TECH VIDEOTAPE S M A N U A L S TRAINING PHILIPS SERVICE AND QUALITY TRAINING LCOS LIQUID CRYSTAL ON SILICON EM7U LCOS REAR PROJECTION TV ...

Page 2: ......

Page 3: ...IP Double Window Input 34 Double Window PIP Output 34 Double Window Control and Power Supply 34 Feature Box 38 Eagle 40 LVDS Transmitter 42 2H Section Block 43 AV3 and AV4 Inputs 47 Analog Input A D Conversion 49 Reference Voltage and A D Converters 59 Input Latch and PLD Sync 59 ADC Clock Circuit 59 Light Engine Block 63 Audio Signal Delay 71 Audio Power Amplifier 74 Audio Protection Circuit 76 C...

Page 4: ...zes All of the screen sizes will have a 16x9 aspect ratio The following table shows the dimensions and weights Screen size Height Width Depth Weight 44 inch 31 7 46 7 14 6 68 8 lbs 55 inch 38 7 57 17 7 83 9lbs The EM7U will come in the Epic and Matchline formats The Matchline version will have Pixel Plus for the 1H inputs The EM7U is a High Definition Ready set with a screen resolu tion of 1280x72...

Page 5: ...ut on the Rear Jack panel is for NTSC only The MON OUT is a monitor output for whichever 1H Tuner AV1 AV2 or Side Jack panel signal has been selected REAR JACK PANEL The indicator LEDs and the Remote Control Receiver are located on the front of the set When the set is turned On the Amber LED will turn On After the Lamp in the set has switched On the Green LED will turn On The Control Panel is loca...

Page 6: ... press the cursor down button to make these selections When Picture is selected use the cursor down button to select the desired subtopic Figure 2 For example press the cursor down button to select Contrast then use the cursor left and cur sor right buttons to change the values Additional dots on the lower part of the line indicate that additional selections are pre sent Continue to press the curs...

Page 7: ...ed Black or gray bars will show at the left and right sides Figure 9 This would be used by the viewer if the original material was in the 14x9 letterbox format Movie Expand 16 9 format stretches the picture horizontally and vertically to fill the 16 9 screen Some of the top and bottom portions of the picture will be deleted Figure 10 This Format would be used by the viewer if the original material...

Page 8: ...gure 15 A door near the Power Cord allows access to the Lamp When this door is open an interlock switch will prevent the set from being turned On When the back cover is removed the switched is in the closed position allowing the set to be serviced A timer in the set will inform the customer when the Lamp should be changed Under the Settings General title the Bulb Replaced selection will reset the ...

Page 9: ... light can pass This limits the resolution of the picture and brightness The Reflective type of LCD like the one used in the LCOS has the electronics beneath the LCD cells allowing greater resolution Figure 19 The LCD cells are turned On switching the individual cells Beneath each cell is a reflective surface The amount of light reflected from each cell depends on the applied voltage Since the LCD...

Page 10: ... the color strips and direct it to the correct part of the LCD Data is directed to the LCD in such a way that the correct data for color illuminating that portion of the LCD will be displayed The LCD is being scanned a rate of 180 Hz The phase of each prism is offset by 30 degrees to provide color separation The reflected light from the LCD is fed to a projection lens the mir ror and finally the s...

Page 11: ...r Board The Lamp Supply is a Boost regulator that supplies 330 volts to the Lamp Driver board The Main Supply produces a 36 a 12 a 22 and a 9 volt supply The 9 volt supply is also fed to a 3 3 volt regulator AC INPUT Figure 22 AC power is connected to the Power Input board via connector 1212 Fuse 1211 provides protection against overcurrent Spark gaps 1214 and 1216 provide protection against exces...

Page 12: ...POWER INPUT BOARD MAIN POWER BOARD POWER BOARD SERVICE POSITION Page 9 ...

Page 13: ...Page 10 FIGURE 21 POWER SUPPLY BLOCK ...

Page 14: ...Page 11 FIGURE 22 AC INPUT CIRCUIT ...

Page 15: ...7 to get brighter The internal resistance of the transistor inside 6207 will be reduced The internal regulator inside 7202 connected to Pin 1 works to keep Pin 1 at 5 8 volts If the current through 6207 increases the current flow through the 5 8 volt regulator will increase This increase in current will cause the voltage across the sensing resistor Re to increase The PWM will then reduce the On ti...

Page 16: ...Page 13 FIGURE 23 STANDBY SUPPLY ...

Page 17: ...tage from Pin 9 of 5310 is rectified by 6309 to produce a negative voltage which is filtered by Capacitor 2365 This voltage along with the 9 volt supply is applied to the input of Shunt regulator 7309 via resistor network of 3354 3355 and 3353 As long as the negative voltage is present on 2365 the voltage on the input of 7309 will be less than the 2 5 volts necessary to turn it On Transistor 7310 ...

Page 18: ...Page 15 FIGURE 24 MAIN POWER SUPPLY ...

Page 19: ...onitored on Pin 5 goes below 3 3 volts the voltage on Pin 5 will drop below the 1 25 volt reference The flip flop will then Set when the Oscillator goes High If the output voltage goes above 3 3 volts the reference voltage on Pin 5 will be above the 1 25 volt internal reference The flip flop will not Set when the Oscillator goes High until the feedback reference voltage on Pin 5 drops below the 1 ...

Page 20: ...Page 17 FIGURE 25 3 3 VOLT REGULATOR ...

Page 21: ...l resistance of the Transistor inside 6404 The 5 8 volt regulator inside 7402 keeps Pin 1 at 5 8 volts To maintain this Pin at the correct voltage the Regulator will increase the current through the sensing resistor Re The voltage across Re is fed to the PWM which reduces the On time of the Internal FET which reduces the output voltage If the secondary voltage should decrease the voltage across Re...

Page 22: ...Page 19 FIGURE 26 AUDIO POWER SUPPLY OPERATING VOLTAGE FOR THE LAMP SUPPLY REGULATOR ...

Page 23: ...On The Control Voltage from the Audio Power supply now becomes the operating voltage for Pin 1 of 7502 Regulation is accomplished by the monitoring of the 330 Lamp voltage by Shunt Regulator 7506 If the 330 volt supply increases 7506 will turn On harder turning Transistor 7500 On harder The increase in current will increase the voltage across the sensing resistor Re inside 7502 The Regulator conne...

Page 24: ...Page 21 FIGURE 27 LAMP SUPPLY ...

Page 25: ...a RGB input while AV6 is a DVI input AV3 and AV4 can accept either a 1H NTSC signal a 480P signal or a 1080I HD signal For best results the 1FH signals should be connected to AV1 AV2 or the Side input It also processes the 2FH signal from the 1FH NTSC section The Signal is processed to output a 1280x720 pixel to the Light Engine The Light Engine con tains all of the display circuits used to projec...

Page 26: ... Tuner video or selected video from the Jack panel If the signal is Composite video it is fed to a 3D Comb filter panel for process ing YC from the 3D Comb filter is fed back to the HIP The HIP then outputs YUV to the PIP DW panel which inserts the Picture in Picture or Split Screen when selected by the cus tomer The Picture in Picture or Split Screen video is selected from the YUV signal the sele...

Page 27: ...Page 24 FIGURE 29 OVER BLOCK 1FH SECTION ...

Page 28: ...posite input is disconnected Zener diodes are con nected to both the Y composite and the C lines to limit the applied voltage to 7 4 volts A 75 ohm resistor on both lines provides the correct impedance matching The Y composite and C signals are output to the Jack panel via the System board FIGURE 30 SIDE JACK PANEL VIDEO Page 25 SIDE JACK PANEL ...

Page 29: ...e direction and 0 6 volts in the negative direction When a connector is placed in the SVHS jack the Composite video input is disconnected The Y signal is routed through an imped ance matching network and clamp and back to Pin 11 of 1218 The C signal is also routed through an impedance matching network clamped to Pin 6 and output on Pin 5 The clamp ing voltage Vp is supplied by the 9 volt source Th...

Page 30: ... is supplied by the 9 volt source The Y signal is also fed to IC 7100 for Sync separation The Y Pb Pr signals are fed to the System board via connector 1220 The circuit on the System Board converts the signals from a Y Pb Pr format to a YUV format To provide prop er impedance matching Transistors 7002 and 7006 buffer the Y signal Transistors 7001 and 7005 phase invert the Pb signal to convert it t...

Page 31: ...switched to the System board and the SSB This signal is used to pro vide Sync separation when the Y Pb Pr input is used There are two sets of switches used for the composite input The output on Pin 39 switches selected video to the PIP DW panel for display in the Picture in Picture or Split Screen window Pin 35 outputs the C signal for the PIP DW circuit The selected composite video for the main p...

Page 32: ... from the Main Power supply board supplies the tun ing voltage This voltage is regulated by Zener diode 6112 and Shunt Regulator 7115 to pro duce 33 volts The 33 volt supply is also fed to the PIP DW panel to supply the tuning volt age for that Tuner The 5 volt supply is also fed to Pin 6 and 7 of the Tuner FIGURE 34 MAIN TUNER Page 29 SYSTEM BOARD ...

Page 33: ...r has selected the Tuner as the main picture 7323 will switch the composite video to Pin 26 The video is then buffered by Transistor 7320 before being output to the 3D Comb Filter board YC from the Comb Filter board is then fed back to 7323 via Pins 28 and 29 If the user has selected external composite video this signal is fed into 7323 on Pin 20 If the user has selected an external SVHS signal th...

Page 34: ...Page 31 FIGURE 35 HIP CIRCUIT ...

Page 35: ...This prevents any high frequency signals from causing problems with the A D conversion The signal from 5006 is buffered by Transistor 7012 and fed to Pin 88 of 7023 A Clamp circuit sets the sampling range of the A D converter A full frame 3D YC separation is performed by the YCS circuit The YC signal is then output to two D A converters that output C on Pin 83 and Y on Pin 84 The Y signal is buffe...

Page 36: ...Page 33 FIGURE 36 NTSC COMB FILTER CIRCUIT ...

Page 37: ... SY SU and SV is output to the PIP processor IC Selected Composite Video is fed to the V Chip processor V Chip processing for the main picture is done by the Microprocessor on the SSB DOUBLE WINDOW PIP OUTPUT Figure 38 The PIP or Double Window YUV signal is fed to the PIP DW processor 7801 The I2 C buss controls the IC from the Microprocessor on the SSB The PIP DW processor outputs YUV for the PIP...

Page 38: ...Page 35 FIGURE 37 PIP DOUBLE WINDOW INPUT ...

Page 39: ...Page 36 FIGURE 38 PIP DOUBLE WINDOW OUTPUT ...

Page 40: ...Page 37 FIGURE 39 DOUBLE WINDOW CONTROL AND POWER SUPPLY ...

Page 41: ...liasing Aliasing shows up as artifacts in the pic ture which is caused by under sampling The Multiplexer combines the three data streams into one Data is output from the PICNIC to FM1 Field Memory IC 7714 The Fields are read by 7718 to the Dynamic Noise Reduction circuit and to the processor The De Interlace writes the Field data to Field Memory 2 7717 and Field Memory 2 7719 The Processor then re...

Page 42: ...Page 39 FIGURE 40 FEATURE BOX NOT USED ...

Page 43: ...le The Input Multiplexer selects which frame is to be read The Vertical and Horizontal Peaking circuit sharpens the edges and adds blue pixels to enhance the picture This circuit is part of the Pixel Plus processing The Scaling circuit scales the picture to 1280x720 pixels to conform to the Light Engine dis play The YUV format circuit converts the picture to conform to the MSB Main Scaler Board in...

Page 44: ...Page 41 FIGURE 41 EAGLE ...

Page 45: ...it signal to a serial data output The output of the LVDS is held at 345mV to prevent RFI Radio Frequency Interference There are four data pairs and one clock pair This circuit uses an 85MHz clock and is able to trans fer data up to 300 Mbytes per second The LVDS data is then sent to the MSB Main Scaler Board for further processing Page 42 FIGURE 42 LVDS TRANSMITTER ...

Page 46: ...fed to the Scaler IC along with the three 8 bit lines from the DVI Digital Video Interface connector The Scaler can perform a 1H to 2H conversion It can also produce a split screen between two inputs Therefore it is possible to have a split screen with the NTSC signal on one side and a HD input on the other side The Scaler also formats the video signal to fit the 1280x720 pixel Light Engine displa...

Page 47: ...Page 44 FIGURE 43 2FH SECTION BLOCK ...

Page 48: ... of the possible inputs to AV5 are VGA 640x480 SVGA 800x600 XGA 1024x768 SXGA 1280x1024 HD60p 1280x720 W VGA 848x480 and W XGA 1368x768 The RGB drive Vertical and Horizontal Sync are all clamped to prevent excessive signal levels from being applied to the set The input signal is clamped to 5 6 volts in the positive direction and 0 6 volts in the neg ative direction Page 45 ...

Page 49: ...Page 46 FIGURE 44 VGA INPUT ...

Page 50: ... negative direction IC 7710 selects the two AV sources This is a High Frequency switching IC with minimal cross talk Pixelworks IC controls the IC via the 2FHIN1_2FH1N2 line The Control line is inverted by Transistor 7725 which is connected to Pin 19 When the Control line is High 7725 turns On to pull Pin 19 Low This selects input AV4 When the Control line goes Low Pin 19 goes High and AV3 is sele...

Page 51: ...Page 48 FIGURE 45 AV3 AND AV4 ...

Page 52: ... data while the GRE GBE and GGE lines carry the Even field data Sync on Y is fed to Pin 12 Sync on Green is fed to Pin 16 while Horizontal and Vertical Sync is fed to Pins 43 and 42 The IC outputs Horizontal Sync on Pins 125 and 126 Vertical Sync is output on Pin 127 Clock information for the data is out put on Pin 123 The IC is controlled by the SDA_SCALER and SCL_SCALER lines from the Pixelworks...

Page 53: ...hen the set is turned On those Transistors are turned On to connect the signal The B line to 7747 and the Data lines are clamped to 5 6 volts Positive and 0 6 volts Negative with Diode Arrays 6761 6752 and 6751 There are three data pairs to 7746 RX0 RX1 and RX2 There is also a Clock line RXC con nected to Pins 93 and 94 Each of these lines is clamped to prevent an excessive signal from being appli...

Page 54: ...Page 51 FIGURE 47 DVI INPUT ...

Page 55: ...he LVDS_PWR_DOWN_n line connected to Pin 25 When AV1 AV2 or the Front Side input is selected the Scaler IC switches Pin 25 High to switch IC 7537 On The Signal from the Eagle is output to the Scaler as digital Y and UV Vertical and Horizontal Sync is output on Pin 54 and 55 The Clock data signal is output on Pin 26 The DE_EMG line goes High when the IC is switched On to signal the Scaler IC that d...

Page 56: ...data inputs to 7407 The YUV input goes to the Video Port This is the digital video information from the SSB AV3 AV4 AV5 and AV6 are applied to the Graphics Port Among the inputs that 7407 can process from the Graphics Port are VGA SVGA XGA and 1080I The Horizontal Image Scaler Crisp Image Scaler and Spatial Noise Reduction circuits perform part of the scaling functions create the Spit Screen if se...

Page 57: ...Page 54 FIGURE 49 SCALER ...

Page 58: ...ssor located on the SSB These are Analog RGB signals with a Fast Blanking line The OSD signals are sent to the MSB via connector 1401 Sync for the text is generated by the PLD located on the MSB This Sync is fed to the OTC via the System Board OSD SCALER INPUT Figure 52 The OSD and Fast Blanking signals are converted to a digital signal and fed to the PLD Programmed Logic Device to be inserted int...

Page 59: ...Page 56 FIGURE 50 OSD AND OUTPUT ...

Page 60: ...Page 57 FIGURE 51 OTC OSD ...

Page 61: ...Page 58 FIGURE 52 OSD SCALER INPUT ...

Page 62: ... used to clock data to the PLD is shown The OTC_BLEND FBLK and two bits of the Blue are fed to Latch 7102 This data is clocked out to the PLD by the CLK_RET line The reference _FDB lines are output from the PLD to set the sample ref erence voltage as described earlier The DIV_ADCLK and HSYNC_PLL sync lines are used to set the CLK_RET and ADC_CLOCK signals ADC CLOCK CIRCUIT Figure 55 The DIV_ADCLK ...

Page 63: ...Page 60 FIGURE 53 REFERENCE VOLTAGE AND A D CONVERTER ...

Page 64: ...Page 61 FIGURE 54 INPUT LATCH AND PLD SYNC ...

Page 65: ...Page 62 FIGURE 55 ADC CLOCK CIRCUIT ...

Page 66: ... Clock from the A D converter and DVI receiver are also fed to the Scaler The A D converter or the DVI Receiver is selected by the Scaler IC The output of the one selected is turned On The output of the other one is turned Off Sync is then fed to the PLD and then to the TMDS Transmitter Sync is transmitted to the Light Engine via data lines LIGHT ENGINE BLOCK Figure 58 TMDS data from the MSB is fe...

Page 67: ...FIGURE 56 TMDS TRANSMITTER Page 64 ...

Page 68: ...Page 65 FIGURE 57 MSB CLOCK AND SYNC ...

Page 69: ...Page 66 FIGURE 58 LIGHT ENGINE BLOCK ...

Page 70: ...ts The selected outputs are fed to the SSB Small Signal Board The Audio Processor on the SSB outputs the audio in a digital form via connector 1683 to an Audio Delay circuit located on the System board Due to the time required to process the video signal it is necessary to delay the audio to ensure proper sync Left and Right audio is output to the Audio Amplifier via connectors 1205 and 1700 Left ...

Page 71: ...Page 68 FIGURE 59 AUDIO SIGNAL FLOW BLOCK ...

Page 72: ...dible Sound and Virtual Dolby The digitized audio is output on Pin 5 to the System board to an Audio Delay circuit The signal is returned to the IC on Pin 6 Due to the time required for the video processing it is necessary to delay the audio to obtain the proper sync The Main Speaker signal is output on Pins 20 and 21 The signal is buffered and fed to ICs 7653 and 7652 ICs 7653 and 7652 connect th...

Page 73: ...Page 70 FIGURE 60 SSB AUDIO PROCESSING ...

Page 74: ...ta from Pin 18 of 7104 down to Pin 12 Each time it is shifted it is delayed The output of 7104 is fed to a second latch 7105 that is controlled by the Clock signal The output of 7105 is fed to a Multiplexer 7106 that is con trolled by switching lines A B and C A B and C switching lines are generated by the System Microprocessor The delayed data is output on Pin 5 of 7106 If the selected signal to ...

Page 75: ...Page 72 FIGURE 61 AUDIO SIGNAL DELAY ...

Page 76: ... is turned On by the 5 2 volt supply via Resistor 3524 This turns Transistor 7668 On which turns On Transistors 7678A 7678B and 7677 This mutes the R CL_VL OUT and L CL_VL OUT which are the MON output lines Transistor 7677 mutes the AUDIO SL SUB OUT line When the charge on Capacitor 2513 reaches 0 7 volts Transistor 7675 B is turned On which turns the other Transistors Off removing the mute FIGURE...

Page 77: ... width of the output signal is determined by the amplitude of the audio signal at that instant The Left channel output is filtered by 5702 2763 5715 and 2736 The Right channel is filtered by 5701 2777 5716 and 2737 Final filtering is performed by chokes 1703 and 1704 The DC voltage on the output lines is moni tored by SHUTD Since the speakers are direct coupled no DC voltage can be allowed on the ...

Page 78: ...Page 75 FIGURE 63 AUDIO POWER AMPLIFIER ...

Page 79: ...ge The Right and Left channels are connected to Transistors 7704 and 7705 via Resistors 3717 and 3718 The signal is filtered by Capacitor 2778 If the DC voltage goes 0 7 volts positive Transistor 7704 will turn On If the voltage goes 0 7 volts Transistor 7705 will turn On This will turn Transistors 7706 and 7707 On which will mute the audio amplifier by pulling the STBY MUTE line Low Transistor 77...

Page 80: ...Page 77 FIGURE 65 AUDIO PROTECTION CIRCUIT ...

Page 81: ...cessor is applied to IC 7116 The volume for the Headphones is controlled by IC 7116 This IC is controlled by the SDA and SCL line s I2 C bus from the OTC located on the SSB Left and Right audio is output on Pins 2 and 9 to the Headphone amplifier IC 7117 The Headphone amplifier is powered by the 5 volt supply FIGURE 66 HEADPHONE SWITCH AND AMPLIFIER Page 78 ...

Page 82: ...mmunicates with the rest of the set via a dual I2 C bus The startup pro gram is located in the Instruction ROM inside the IC The Main program is located in external DRAM An internal Text decoder removes the Closed Caption text and Teletext information There are three other Microprocessors in the set located on the MSB Main Scaler Board System board and in the Light Engine FIGURE 67 OTC MICROPROCES...

Page 83: ...n the set is turned On Once all of the circuits are turned On this line turns that LED Off The Standby line then goes Low which turns the Green LED On A Light Sensor connected to Pin 116 senses the ambient light to allow the set to change the bright ness for optimum viewing The NVM 7011 stores the customer settings operation hours and option codes The program to run the OTC is stored in IC 7006 IC...

Page 84: ...Page 81 FIGURE 68 OTC COMMUNICATION ...

Page 85: ...yboard line when pressed A LED is mounted under the Standby switch LIGHT SENSOR Figure 70 The Light Sensor 6004 is amplified by two op amps 7001 and 7000 This senses the ambi ent light The output of 7000 is fed to the OTC to make adjustments in the picture brightness to compensate for the changes in ambient light FIGURE 69 KEYBOARD FIGURE 70 LIGHT SENSOR Page 82 ...

Page 86: ...en blink Red I2 C INTERCONNECT PART ONE Figure 72 The OTC communicates with the set via two I2 C busses The SDA F Fast bus communicates with the PICNIC HIP and MSP Audio Processor The SN DA line from the processor in the PICNIC communicates with the FALCONIC and EAGLE The SDA S Slow bus communicates with the devices on the System board Jack Panel PIP DW board MSB and 3D Comb filter board The ComPa...

Page 87: ...Page 84 FIGURE 72 I 2 C INTERCONNECT PART ONE ...

Page 88: ... digital OSD from the OTC with the digital video signal from the Pixelworks IC 7407 The OTC sends and receives commands to and from the PLD via the I2 C Slow bus These commands are then relayed to the main Microprocessor on the MSB 7407 IC 7407 controls its internal video processing functions as well as external switching IC 7407 has its own NVM 7405 which stores format and video switching command...

Page 89: ...Page 86 FIGURE 74 I 2 C INTERCONNECT PART THREE ...

Page 90: ...he Light Engine The Sensor Board is located on the bottom of the set s cabinet Figure 75 As the tempera ture increases the resistance of 3006 increases This reduces the drive to Transistor 7001 allowing more current to feed Transistor 7002 via Resistor 3001 When Transistor 7002 turns on harder the voltage on the AMP TEMP line increases The Sensor Board is powered by the 5 volt supply from the Syst...

Page 91: ...ntrol drive A Hall Effect sensor on the System Fan feeds drive back to the System Board via connector 1251 Pin 3 Feedback from the Light Engine Fan is fed back on connector 1251 Pin 2 The SYS_FAN_TACH for the System Fan and the ENGINE FAN TACH signals are fed to a Fan Failure detection circuit which signals the System Microprocessor 7108 if the Fan should stop Figure 78 When the signal line goes H...

Page 92: ...Page 89 FIGURE 77 FAN DRIVE CIRCUIT ...

Page 93: ...Page 90 FIGURE 78 FAN FAILURE DETECTION CIRCUIT ...

Page 94: ...Page 91 FIGURE 79 WIRING INTERCONNECT PART 1 ...

Page 95: ...Page 92 FIGURE 80 WIRING INTERCONNECT PART 2 ...

Page 96: ...Page 93 FIGURE 81 WIRING INTERCONNECT PART 3 ...

Page 97: ...DISASSEMBLY Number 10 Torx and 20 Torx are required for disassembly EXPLODED VIEW Page 94 SMALL SIGNAL ELECTRONICS POWER SUPPLIES LIGHT ENGINE MOUNT MIRROR PROJECTION SCREEN PROTECTIVE SCREEN ...

Page 98: ...REMOVE SCREWS FROM THE SERVICE COVER THEN PULL THE COVER AWAY FROM THE SET A FEW INCHES UNPLUG THE CENTER CHANNEL AMP SWITCH Page 95 ...

Page 99: ...UNPLUG THE SIDE JACK PANEL YOU MAY NOW SET THE REAR COVER ASIDE TO SERVICE THE SMALL SIGNAL ELECTRONICS PACKAGE FIRST REMOVE THE MOUNTING SCREWS Page 96 ...

Page 100: ...THEN SLIDE THE PACKAGE OUT OF THE SET POWER INPUT BOARD IN A SERVICE POSITION Page 97 ...

Page 101: ...TO SERVICE THE BOARDS IN THE SMALL SIGNAL SECTION IT IS NECESSARY TO REMOVE THE REAR COVER TO THIS SECTION SCALER AND JACK PANEL EXTENDER BOARD Page 98 ...

Page 102: ...PIP DW COMB FILTER SYSTEM BOARD SMALL SIGNAL BOARD SSB JACK PANEL SCALER BOARD MSB Page 99 ...

Page 103: ......

Page 104: ...MICKIE MARTIN 05 05 03 ...

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