7.
Circuit Diagrams and PWB Layouts
Digital Board 1.5: VSM, Buffer Memory and Bit Engine Interface
GND
PLL
t
DQMH
SENSE AMPLIFIERS
COMMAND
DECODE
CTRL
LOGIC
MODE
REG
ADDRESS REGISTER
ROW
ADDR
MUX
LOGIC
CTRL
BANK
COLUMN
ADDR
COUNTER/
I/O GATING
DQM DATA LOGIC
READ DATA LATCH
WRITE DRIVERS
DATA INPUT REGISTER
DATA OUTPUT REGISTER
DQML
VDDQ
VDD
NC
VSSQ
VSS
LATCH
REFRESH
COUNTER
BANK0
ROW-
ADDR
LATCH &
DECODER
COLUMN
DEDCODER
BANK0
MEMORY
ARRAY
(4,096x256x16)
DVDR VERSATILE STREAM MANAGER
VSM
3
4
5
I182 H13
I183 B1
I184 D10
I186 E3
I187 E3
I181 G1
1101 H1
2100 A4
2101 A4
2102 A5
2103 A5
I188 H3
I155 E10
I156 E3
I157 E3
I158 E10
7
I159 E3
I160 E10
I161 E3
I162 E10
I163 E3
I164 E10
I165 E3
I166 E10
I167 B15
I168 F6
I169 B12
I170 F6
I171 B15
I172 B12
I173 C15
I174 C15
I175 C15
I176 F1
I177 F1
I178 F1
I179 F1
I180 G1
1
2
B
C
8
9
10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
2118 A6
2119 A4
2120 B15
2121 B15
2122 B14
6
2107 A5
D
SDRAM
2106 A5
SYSTEM_CONTROL
2104 A5
2105 A5
2108 A5
B
C
D
E
F
G
H
1100 C1
15
A
5100 A4
5101 A12
5102 B1
F
A
G
DATA STREAM BUS
2137 G4
AUDIO ENCODER
H
E
2141 G2
2140 G2
2138 G1
2139 G14
11
12
13
14
I101 B10
I102 C10
I103 C10
4102 F6
3110 F2
3111 B3
3113 B3
3114 B2
3112 B3
2147 D1
2148 E1
2149 E1
2150 E1
2151 F1
2152 G1
2153 H15
2154 H15
2160 H15
3100 D11
3101 F10
3102 E3
3103 D11
3104 C2
4110 D11
4111 G13
I109 H13
I110 H13
I111 D1
5103 F14
3115 E3
3116 E3
3117 D11
3118 D11
3119 F10
3120 G15
3121 H12
3122 H13
3123 H12
3124 H13
3125 F13
3126 H13
3127 G2
3128 G2
3129 H2
3130 H12
3131 D2
3132 E2
3133 E2
3134 E2
3135 E2
3136 G1
7105 H3
I100 A4
3107 C3
3108 F2
UART1
4103 F7
4104 G6
4105 G7
4106 G12
4107 G12
4108 G12
4109 G12
I107 G13
I108 G13
SYSTEM DATA BUS
JTAG_CHAIN3
3109 F2
2126 B12
2127 B12
SYSTEM ADDRESS BUS
2125 B13
2124 B13
2123 B14
2109 A5
2110 A5
2111 A5
2112 A5
2113 A5
2114 A5
2115 A6
2116 A6
2117 A6
3105 D2
3106 F2
3137 B2
3138 B2
3139 H4
4100 C15
2142 G2
3140 G3
2144 H1
2143 H1
2145 H1
2146 A4
2128 B3
2129 G13
2130 G15
2131 H15
2132 B1
2134 D1
2135 G14
2136 F1
7101 B14
7100 B4
I125 C3
I126 G1
I127 C3
7104 G4
I124 H15
7102 G13
7103 C1
Encoding
I104 C10
I128 C3
6100 F13
I149 G13
I152 E10
I153 E10
I112 B3
I154 E10
I121 C3
I122 H13
I129 C3
I123 C3
I113 B3
I114 B3
I115 B3
I116 C3
I117 C3
I118 C3
I119 C3
I120 C3
I134 F4
I136 F4
I137 E2
I138 F4
I140 C15
I141 A12
I142 D10
I143 D10
TO BITENGINE
MPEG2 VIDEO
BE_SERIAL
DIGITAL VIDEO(CCIR656)
UART2
Audio PLL
I105 G15
I106 G15
I145 F6
I147 D10
OPTION
OPTION
OPTION
OPTION
OPTION
OPTION
OPTION
OPTION
OPTION
OPTION
OPTION
OPTION
OPTION
OPTION
OPTION
OPTION
OPTION
OPTION
I130 F14
I131 C3
I132 G4
I133 F4
I182
100n
2114
3119
2K2
BFS20
7105
I124
4K7
3113
13
14
15
2
3
4
5
6
7
8
9
1101
FMN
1
10
11
12
3114
4K7
100n
2104
I116
I171
33p
2129
I134
I166
GNDD
I145
2128
1n
GNDD
I117
GNDD
4100
I103
8
INH
5
PC1O|PCPO
2
PC2O
13
R1
11
R2
12
RB
15
SIGI
14
VCC
16
VCOI
9
VCOO
4
2134
10p
7102
74HCT9046AD
C1A
6
C1B
7
COMPI
3
DEMO
10
1
I133
I174
100n
2122
10p
2147
100n
2107
I176
GNDD
I143
I162
100n
2160
GNDD
3102
10K
3107
10R
3100
10K
100n
2110
4K7
3140
22K
3139
GNDD
2103
100n
GNDD
4103
10p
2151
GNDD
GNDD
100n
2117
56R
3120
4109
I105
4108
I122
I111
2113
100n
220n
2154
I165
10K
3116
3117
22R
2145
22p
2131
4u7
I126
4K7
3137
100n
2100
3128
47R
4111
3129
47R
10K
3115
BAS316
6100
3130
NTH5G16P
4107
GNDD
I161
4106
100n
2116
2146
100n
I157
I123
I129
2121
100n
100MHZ
5101
I100
GNDD
3138
4K7
I149
GNDD
I180
I183
2140
10p
47R
3108
GNDD
GNDD
4102
I168
GNDD
GNDD
4104
I186
I127
3122 15K
4u7
2119
100n
2105
I173
GNDD
2150
10p
3112
4K7
100n
2120
2K2
3101
2108
100n
I125
2
3
1
NC
5
4
2136
47p
GNDD
7104
74HC1G04GW
I167
3105
47R
GNDD
4u7
2135
GNDD
3104
47R
10p
2144
GNDD
GNDD
2106
100n
7
8
9
1R
3121
FMN
1100
1
10
11
12
13
14
15
2
3
4
5
6
I155
GNDD
I108
2102
100n
I132
I130
I170
I140
I137
100n
2111
10p
2138
I141
I188
I181
1R
3136
10p
2152
2139
I179
100n
100n
2125
I112
1R
3134
I152
I142
I104
I115
I158
GNDD
2123
100n
3124 5K6
GNDD
GNDD
1R
3135
I102
I163
I118
2101
100n
I175
GNDD
GNDD
I101
I172
GNDD
GNDD
I106
I120
I177
I128
2130
2u2
I110
2141
3110
47R
47p
11K
3123
47R
3127
GNDD
3125
22R
VSS_36
46
VSS_46
57
VSS_57
67
VSS_67
VSS_78
78
80
VSS_80
90
VSS_90
I121
154
VSS_154
155
VSS_155
161
VSS_161
175
VSS_175
182
VSS_182
192
VSS_192
208
VSS_208
VSS_21
21
24
VSS_24
26
VSS_26
36
VE_D9
127
VE_DSn
128
VE_DTACKn
142
VE_VIP_ERROR
10
VSS_10
100
VSS_100
VSS_116
116
130
VSS_130
132
VSS_132
135
VSS_135
150
VSS_150
123
VE_D13
124
VE_D14
125
VE_D15
VE_D2
111
112
VE_D3
113
VE_D4
114
VE_D5
115
VE_D6
117
VE_D7
118
VE_D8
119
52
VDD_52
62
VDD_62
73
VDD_73
77
VDD_77
85
VDD_85
95
VDD_95
109
VE_D0
VE_D1
110
120
VE_D10
121
VE_D11
122
VE_D12
VDD_144
15
VDD_15
156
VDD_156
VDD_169
169
181
VDD_181
183
VDD_183
VDD_201
201
25
VDD_25
31
VDD_31
41
VDD_41
5
VDD_5
134
VBI_IPD1
136
VBI_IPD2
137
VBI_IPD3
VBI_IPD4
138
139
VBI_IPD5
140
VBI_IPD6
141
VBI_IPD7
108
VDD_108
126
VDD_126
129
VDD_129
144
166
TRSTn
148
UART1_CTSn
147
UART1_RTSn
145
UART1_RX
146
UART1_TX
153
UART2_CTSn
152
UART2_RTSn
UART2_RX
149
151
UART2_TX
131
VBI_ICLK
133
VBI_IPD0
M_RASn
75
M_UDQM
76
M_Wen
48
RESETn
47
SYSCLK
162
TCK
TDI
163
TDO
164
172
TEST0
173
TEST1
165
TMS
98
M_D15
94
M_D2
92
M_D3
M_D4
89
87
M_D5
84
M_D6
82
M_D7
81
M_D8
83
M_D9
79
M_LDQM
70
66
M_A9
74
M_CASn
71
M_CLKEN
72
M_CLKOUT
99
M_D0
97
M_D1
86
M_D10
M_D11
88
91
M_D12
93
M_D13
96
M_D14
69
M_A11
65
M_A12
68
M_A13
55
M_A2
53
M_A3
M_A4
54
56
M_A5
59
M_A6
61
M_A7
64
M_A8
11
HO_D5
9
HO_D6
8
HO_D7
HO_D8
7
6
HO_D9
18
HO_PROCCLK
20
HO_RWn
19
HO_WAIT
60
M_A0
58
M_A1
63
M_A10
16
HO_D1
4
HO_D10
3
HO_D11
2
HO_D12
1
HO_D13
207
HO_D14
HO_D15
206
14
HO_D2
13
HO_D3
12
HO_D4
202
HO_A4
HO_A5
200
199
HO_A6
198
HO_A7
197
HO_A8
HO_A9
196
28
HO_BEN0
27
HO_BEN1
23
HO_CSHn
22
HO_CSLn
17
HO_D0
HO_A14
189
HO_A15
HO_A16
188
HO_A17
187
186
HO_A18
HO_A19
185
204
HO_A2
184
HO_A20
180
HO_A21
179
HO_A22
203
HO_A3
44
D_WCLK
171
EXT_INT0
170
EXT_INT1
168
EXT_INT2
167
EXT_INT3
205
HO_A1
HO_A10
195
194
HO_A11
193
HO_A12
191
HO_A13
190
39
D_PAR_D2
D_PAR_D3
40
42
D_PAR_D4
43
D_PAR_D5
35
D_PAR_D6
D_PAR_D7
37
38
D_PAR_DVALID
30
D_PAR_REQ
32
D_PAR_STR
29
D_PAR_SYNC
45
D_V4
103
BE_DATI
104
BE_DATO
BE_FLAG
106
105
BE_SYNC
107
BE_V4
102
BE_WCLK
50
CPUINT0
49
CPUINT1
33
D_PAR_D0
34
D_PAR_D1
ACC_ACLK_DAI
51
ACC_ACLK_DEC
158
ACC_ACLK_OSC
159
ACC_ACLK_PLL
143
ACC_FID
157
ACC_PWM
AE_BCLK
176
174
AE_CS
178
AE_DATA
177
AE_WCLK
101
BE_BCLK
2132
100n
SAA7333HL
7100
160
I119
I160
I136
I178
18
1
14
27
3
9
43
49
28
41
54
6
12
46
52
WE_ 16
48
DQ13
50
DQ14
51
DQ15
53
DQ2
5
DQ3
7
DQ4
8
DQ5
10
DQ6
11
DQ7
13
DQ8
42
DQ9
44
DQMH
39
DQML
15
36
40
RAS_
29
A5 30
A6 31
A7 32
A8 33
A9 34
BA0 20
BA1 21
CAS_ 17
CKE 37
CLK 38
CS_ 19
DQ0
2
DQ1
4
DQ10
45
DQ11
47
DQ12
MT48LC4M16A2TG-7E
7101
A0 23
A1 24
A10 22
A11 35
A2 25
A3 26
A4
3106
47R
I138
I113
1R
3133
3118
22R
7103
2
GND
3
1
6
5
VCC
4
GNDD
NC7SZ58
3126 220K
I153
I159
I109
I164
GNDD
100n
2137
2127
4u7
4K7
3111
I184
10p
2142
2126
100n
2143
10p
10K
3103
1R
3132
5103
100MHZ
2118
100n
47R
3109
4105
5102
I107
GNDD
2112
100n
I156
2148
10p
10p
2149
I114
4110
100n
2153
I154
I169
I147
100MHZ
5100
GNDD
I187
1R
3131
I131
2124
100n
2109
100n
2115
100n
ACC_ACLK_OSC
AD_BCLK
GNDD
GNDD
ACC_ACLK_PLL
VSM_UART2_RX
VSM_UART2_CTSn
+5V
+5V
BE_IRQn
+5V
+3V3
BE_LOADN
+3V3
AE_BCLK
AE_ACLK
BE_FAN
BE_BCLK
BE_WCLK
BE_DATA_RD
BE_FLAG
BE_SYNC
BE_V4
VIP_INT
VSM_M_A(13:0)
VSM_M_D(15:0)
VSM_UART1_RX
+3V3
BCLK_CTL_SERVICE
BE_BCLK_VSM
VSM_UART2_RTSn
VCC5_4046
RESETn_BE
BE_DATA_WR
+5V
VSM_UART2_TX
+5V
VSM_UART1_RTSn
+5V
VSM_UART1_TX
VCC3_VSM
JTAG3_TRSTn
JTAG3_TMS
JTAG3_TD_VSM_TO_VIP
JTAG3_TCK
AE_DATAO
AE_BCLK_VSM
VCC3_VSM
EMPRESS_IRQn
VCC3_VSM
VIP_FID_FF
D_PAR_SYNC
D_PAR_STR
D_PAR_REQ
D_PAR_DVALID
CPUINT1
CPUINT0
AE_WCLK_VSM
5508_odd_even
VIP_ICLK
VSM_UART1_CTSn
SYSCLK_VSM_5508
RESETn
ACLK_EMP
VCC3_VSM
+5V
BE_V4
BE_FLAG
BE_SYNC
BE_DATA_WR
BE_DATA_RD
BE_WCLK
VIP_ERROR
VE_DTACKn
VE_DSn
VCC3_VSM_MEM
VSM_M_LDQM
{VSM_M_LDQM,VSM_M_UDQM,VSM_M_WEn,VSM_M_RASn,VSM_M_CASn,VSM_M_CLKEN,VSM_M_CLKOUT}
D_PAR_D(7:0)
VCC3_VSM
+3V3
+3V3
VSM_M_CASn
VSM_M_UDQM
VSM_M_RASn
VSM_M_WEn
VSM_M_CLKOUT
VSM_M_CLKEN
2V / div DC 50ns / div
acc_aclk_pll
2V / div DC 20ns / div
VSM_M_CLK
TR 06038_001
040203
Summary of Contents for DVDR70/001
Page 88: ...Diagnostic Software EN 88 DVDR70 DVDR75 0x1 5 ...
Page 138: ...EN 138 DVDR70 DVDR75 0x1 7 Circuit Diagrams and PWB Layouts Layout DVIO Board Part 1 Top View ...
Page 139: ...Circuit Diagrams and PWB Layouts EN 139 DVDR70 DVDR75 0x1 7 Layout DVIO Board Part 2 Top View ...
Page 166: ...EN 166 DVDR70 DVDR75 0x1 7 Circuit Diagrams and PWB Layouts ...
Page 194: ...Circuit IC descriptions and list of abbreviations EN 194 DVDR70 DVDR75 0x1 9 Figure 9 15 ...
Page 195: ...Circuit IC descriptions and list of abbreviations EN 195 DVDR70 DVDR75 0x1 9 Figure 9 16 ...
Page 220: ...Circuit IC descriptions and list of abbreviations EN 220 DVDR70 DVDR75 0x1 9 ...
Page 221: ...Circuit IC descriptions and list of abbreviations EN 221 DVDR70 DVDR75 0x1 9 ...
Page 223: ...Circuit IC descriptions and list of abbreviations EN 223 DVDR70 DVDR75 0x1 9 ...
Page 224: ...Circuit IC descriptions and list of abbreviations EN 224 DVDR70 DVDR75 0x1 9 ...
Page 225: ...Circuit IC descriptions and list of abbreviations EN 225 DVDR70 DVDR75 0x1 9 ...
Page 226: ...Circuit IC descriptions and list of abbreviations EN 226 DVDR70 DVDR75 0x1 9 ...
Page 227: ...Circuit IC descriptions and list of abbreviations EN 227 DVDR70 DVDR75 0x1 9 ...
Page 228: ...Circuit IC descriptions and list of abbreviations EN 228 DVDR70 DVDR75 0x1 9 ...
Page 229: ...Circuit IC descriptions and list of abbreviations EN 229 DVDR70 DVDR75 0x1 9 ...
Page 231: ...Circuit IC descriptions and list of abbreviations EN 231 DVDR70 DVDR75 0x1 9 ...
Page 232: ...Circuit IC descriptions and list of abbreviations EN 232 DVDR70 DVDR75 0x1 9 ...
Page 233: ...Circuit IC descriptions and list of abbreviations EN 233 DVDR70 DVDR75 0x1 9 ...
Page 235: ...Circuit IC descriptions and list of abbreviations EN 235 DVDR70 DVDR75 0x1 9 ...
Page 237: ...Circuit IC descriptions and list of abbreviations EN 237 DVDR70 DVDR75 0x1 9 ...
Page 238: ...Circuit IC descriptions and list of abbreviations EN 238 DVDR70 DVDR75 0x1 9 ...