Service Modes, Error Codes, and Fault Finding
EN 22
BJ3.0E PA
5.
Figure 5-3 “Off” to “Semi Stand-by” flowchart (part 1)
G_15960_118a.eps
100306
All I/O lines have a High default state:
- Assert the Viper reset.
- Sound-Enable and Reset-Audio should remain high.
- NVM power line is high, no NVM communication possible.
Off
Standby Supply starts running.
+5V2, 1V2Stb, 3V3Stb and +2V5D become present.
In case of PDP 3V3 Vpr to CPU PDP becomes present.
st-by µP resets
No
Stand by or
Protection
Mains is applied
- Switch Sound-Enable and Reset-Audio high.
They are low in the standby mode if the
standby mode lasted longer than 10s.
Enable the +1V2 supply (ENABLE-1V2)
detect-5V
received within 2900 ms after
POD-MODE I/O line
toggle?
No
Yes
ac5V supply detection algorithm
+12V error
detect-12VSW received within
2900 ms after POD-mode I/O
line toggle?
No
SP
ac12VSW supply
detection algorithm
Yes
+5V, +8V6, +12VS, +12VSW and Vsound are switched on
Switch ON all supplies by switching LOW the POD-MODE
and the ON-MODE I/O lines.
Initialise I/O pins of the st-by µP, start keyboard scanning, RC
detection, P50 decoding. Wake up reasons are off.
If the protection state was left by short circuiting the
SDM pins, detection of a protection condition during
startup will stall the startup. Protection conditions in a
playing set will be ignored. The protection mode will
not be entered.
PDPGO line is high (either HW wise in a non FHP set or
because of the stby µP reset in a FHP set) which is the good
state at cold boot to be able to start the FHP.
Switching the POD-MODE
low in an FHP PDP set
makes the CPUGO go high
and starts the PDP CPU.
PDPGO
=
High?
Switch PDPGO high:
PDP should start: 5V, 8V6 and
12V are activated
No
Yes
+5V error
detect-5V
received within
2900 ms after PDPGO
toggle?
No
SP
Yes
- Only when the PDPGO is low, a retry should be
considered (the PDP could have reset internally). If
the PDPGO is already high, there is no use in trying
to restart.
- PDPGO line is pulled high in all non FHP sets so
this extra startup delay in case of a fault condition
is not valid.
- Switching the PDPGO high will give a visual
artefact and should only be done if really
necessary.
Switching the POD-MODE and the
ON-mode low in an SDI PDP set
makes the PDP supplies go to the
ON mode.
Wait 50ms and then start polling the detect-
5V, detect-8V6 and detect-12V every 40ms.
The availability of the supplies is checked through detect signals (delivered by
dedicated detect-IC's) going to the st-by µP. These signals are available for
+12V, +8V6, +5V, +1V2 and +2V5. A low to high transition of the signals should
occur within a certain time after toggling the standby line. If an observers is
detected before the time-out elapses, of course, the process should continue in
order to minimize start up time.
Switch LOW the NVM power reset line. Add a 2ms delay
before trying to address the NVM to allow correct NVM
initialization.
detect-8V6 received
within 6300 ms after POD-mode I/O line
toggle? Startup shall not wait for this
detection and continue startup.
No
No need to wait for the 8V6 detection at this point.
Yes
Audio Protection Line
HIGH?
No
Yes
Audio Error
SP
The audio protection circuit shuts down the supply
autonomously. This triggers a set restart and during that restart
(so at this check here), it will be observed that the audio
protection line is high and the audio protection mode is entered.
This condition is not valid for an SDI PDP. In this PDP set, the
audio protection latch is not present and hence the HIGH
condition here will never be observed. As a result, when an
audio protection occurs, the set will restart and will enter a
supply protection mode because of a missing power supply.
To part B
To part B
To part B
To part B
action holder: MIPS
autonomous action
action holder: St-by
