IC Data Sheets
8.
8.3
Diagram
, PNX85500 (IC7S00)
Figure 8-3 Internal block diagram and pin configuration
1
8
770_
3
0
8
_100217.ep
s
100217
Block diagram
Pinning information
T
S
o
u
t/in for
T
S
inp
u
t
CVB
S
, Y/C,
LVD
S
for
a
n
a
log CVB
S
S
PDIF
Low-IF
SS
IF, LR
HDMI
CI/CA
MPEG
PRIMARY
LVD
S
VIDEO
S
ECONDARY
MEMORY
VIDEO
3
D COMB
DIGITAL IF
AUDIO DEMOD
AUDIO IN
HDMI
S
CALER,
AUDIO D
S
P
AUDIO DAC
S
AUDIO OUT
450 MHz
500 MHz
I
2
C
PWM Px_x
IR
ADC
UART
I
2
C
GPIO
Fl
as
h
a
n
a
log
au
dio
I
2
S
S
PDIF
S
Y
S
TEM
U
S
B 2.0
PNX
8
550x
DVB-T/C
ch
a
nnel decoder
DVB
AV-PIP
S
PI
RECEIVER
(
8
051)
CONTROLLER
AND DECODE
DECODER
PCMCIA
RGB
PROCE
SS
OR
S
Y
S
TEM
CONTROLLER
MULTI-
S
TANDARD
VIDEO
DECODER
24KEf CPU
MIP
S3
2
x 10
AV-D
S
P
REDUCTION
AND NOI
S
E
DE-INTERLACE
OUTPUT
VIDEO
S
UB-PICTURE
ENCODER
OUTPUT
VIDEO
qua
d ch
a
nnel)
(
s
ingle, d
ua
l or
fl
a
t p
a
nel di
s
pl
a
y
DRAWING
ENGINE
S
c
a
tter/G
a
ther
T
S
Dem
u
x
Motion-
a
cc
u
r
a
te
pixel proce
ss
ing
S
D
Memory
C
a
rd
Ethernet
MAC
a
n
a
log Y/C
Direct-IF
PNX
8
550xE
Tr
a
n
s
p
a
rent top view
2
4
6
8
10 12
1
3
14
15 17
16
19
1
8
20
21 2
3
22 24
25
26
1
3
5
7
9 11
ba
ll A1
index
a
re
a
AB
AD
AA
AC
Y
W
V
U
R
N
T
P
M
L
K
J
H
F
D
G
E
C
B
A
AF
AE