26
7.
Circuit Diagrams and PWB Layouts
SSB: Sync Interface
I443
7436-3 D3
6430 A3
6431 B3
RES
I440 C6
9
I454 B2
I443 B5
9
I453 B3
7436-2 C7
3431 A3
4440 D2
4
3453 B6
4437 B6
RES
B
5
RES
1
I450 D8
3
4439 E2
1440 D9
6
4436 A6
4441 E2
4
6
5431 E8
3462 E4
3451 A5
3458 D2
3459 D4
0V
A
A
3463 C4
3454 B7
E
3432 B3
2
2
I451 E9
7
8
3V1
8
TO SIDE CONNECTORS
3
7
RES
C
D
D
C
7430 B3
1
7436-4 D4
7436-1 A6
RES
7436-5 E4
+3V3STBY
1441
B3B-PH-SM4-TBT(LF)
+3V3SW
4438 D2
I449 D8
&
3455 C6
3456 C7
B
FOR ITV ONLY
I452 E9
5
3461 E2
1441 E9
7436-6 E3
2447 E8
2449 E4
E
I430 B3
RES
SYNC INTERFACE
2448 E9
3463
+3V3SW
74LVC14APW
13
7
14
12
7436-6
+3V3SW
100R
3455
74LVC14APW
5
7
14
6
7436-3
4
5
6
7
1440
BM05B-SRSS-TBT
1
2
3
3456
100R
7436-1
74LVC14APW
1
7
14
2
2449
100n
I440
4K7
3451
100R
3454
I453
100R
4441
3461
3453
100R
+3V3SW
4437
+5V
+5VSW
+3V3STBY
4439
4440
I451
5431
+12VSW
6431
1N4148
I449
I450
I454
100R
3462
7
14
8
+3V3SW
7436-4
74LVC14APW
9
3459
100R
3431
1K0
3432
BZX384-C2V7
6430
7430
PDTC114ET
4438
I430
+3V3SW
3458
100R
4
7436-2
74LVC14APW
3
7
14
11
7
14
10
7436-5
74LVC14APW
2447
10p
1
2
3
4
5
I452
10p
2448
4436
SC1_CVBS_RF_OUT
VSYNC
H_1FH
Vsync_SDTV
ITV_IR_SW_RESET
HOUT
COL_HREF
H_DELAY
V_1FH
COL_VA
LED_SEL
Vsync_SDTV
Hsync_SDTV
3139 123 6145.4 *
For LATAM diversity see table in chapter 10
B3
B3
H_16980_003.eps
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