IC Data Sheets
8.
Figure 8-2 Pin configuration
19930_301.eps
Pinning Information
MT5593FPIJ/UPIJ
900
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
A
NC
CI_A5 CI_A6 CI_A7
CI_A1
2
CI_MD
I1
CI_MD
I0
CI_INT
SPI_D
ATA
CI_TS
VAL
D_TSC
LK
USB_D
P_P0
USB_D
P_P1
0_RX_
2
0_RX_
1
0_RX_
0
0_RX_
C
1_RX_
2
1_RX_
C
2_RX_
0
3_RX_
1
10_HD
MI
10_SS
USB
SSUSB
_RXN
33_SS
USB
SSUSB
_TXN
SSUSB
_VRT
AIN_R
3
AIN_R
1
NC
A
B
CI_A2 CI_A4
GPIO4
7
CI_MD
I7
CI_MD
I4
CI_MI
VAL
CI_MD
I2
CI_MIS
TRT
CI_MD
O6
CI_MD
O5
SPI_CL
K
PVR_T
SCLK
CI_TSS
YNC
IF_AG
C
USB_V
RT_P0
USB_D
M_P0
USB_D
M_P1
0_RX_
2B
0_RX_
1B
0_RX_
0B
0_RX_
CB
1_RX_
2B
1_RX_
CB
2_RX_
0B
3_RX_
1B
10_HD
MI
DVSS
SSUSB
_RXP
DVSS
SSUSB
_TXP
AIN_L
2
AIN_R
0
DVSS
AIN_R
2
B
B
C
CI_A0 CI_A1
CI_MD
O2
CI_MD
I6
GPIO6
4
CI_MD
I3
CI_A1
4
CI_A1
3
CI_D6
SPI_CL
E
SPI_CL
K1
DATA
0
CI_TS
CLK
RF_AG
C
DVSS
DVSS
1_RX_
1
1_RX_
0
2_RX_
2
2_RX_
1
2_RX_
C
3_RX_
2
3_RX_
0
3_RX_
C
USB_D
P_P2
AL0_A
DAC
AR2_A
DAC
AIN_L
3
AIN_L
1
C
D
SD_D0
SD_C
MD
GPIO4
2
CI_D2
CI_MD
O1
GPIO6
3
GPIO6
6
VCC3I
O_SD
CI_MD
I5
CI_MC
LKI
CI_A1
1
CI_A1
0
CI_MD
O7
CI_MD
O3
GPIO4
4
PVR_T
SVAL
D_TSD
ATA0
D_TSS
YNC
1_RX_
1B
1_RX_
0B
2_RX_
2B
2_RX_
1B
2_RX_
CB
3_RX_
2B
3_RX_
0B
3_RX_
CB
USB_D
M_P2
HDMI_
3_SDA
HDMI_
3_SCL
AR1_A
DAC
AR0_A
DAC
AIN_L
0
VMID_
AADC D
D
E
SD_D2
GPIO4
6
CI_D1
CI_MD
O0
GPIO6
5
GPIO6
2
GPIO6
1
CI_A8 CI_A9 CI_D5 CI_D7 CI_D4
PVR_T
SSYNC
DEMO
S
S
V
D
S
S
V
D
T
S
R
_
D
1_PWR
5V
2_PWR
5V
ADIN3
_SRV
3_PWR
5V
AL2_A
DAC
AL1_A
DAC
XTALI
XTAL
O
E
E
F
VCC3I
O_A
SD_CL GPIO4
8
GPIO4
5
CI_D0 DVSS
DVSS
CI_MD
O4
CI_D3
SDAT
A0
D_TSV
AL
D_TSD
ATA1
D_TSD
ATA7
MHL_S
ENSE
D_TSD
ATA6
HDMI_
0_SCL
HDMI_
0_SDA
0_HPD
_CBUS
HDMI_
1_HPD
HDMI_
2_HPD
HDMI_
2_SDA
HDMI_
3_HPD
N_DE
MOD
P_DEM
OD
F
G
AVDD
33_DD
R
AVSS_
DDR
NC
NC
DVSS
GPIO4
3
SDAT
A1
FSRC_
WR
D_TSD
ATA2
D_TSD
ATA5
HDMI_
CEC
0_PWR
5V
ASPDI
FO1
HDMI_
1_SDA
HDMI_
1_SCL
HDMI_
2_SCL
33_XT
AL_ST
33_DE
MOD_ G
G
H
NC
NC
NC
NC
NC
NC
NC
D_TSD
ATA3
D_TSD
ATA4
SIF_C
OM
CVBS0
P
H
H
J
NC
DVSS
NC
NC
DVSS
DVSS
ADIN6
_SRV
CVBS_
COM
PR0P
CVBS3
P
J
K
NC
NC
NC
NC
DVSS
NC
NC
DVSS
DDRV
X_OU
T
CVBS1
P
CVBS2
P
PB0P
COM0
K
L
NC
NC
NC
NC
NC
NC
DVSS
DDRV
LOUTP
LOUT
N
33_LV
DSA
DVSS
ADIN4
_SRV
ADIN0
_SRV
ADIN2
_SRV
Y0P
SOY0
PR1P
L
M
NC
TN_AR
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
L
L
P
M
AVSS3
3_CLN
AVSS3
3_RGB
33_AA
DC
33_AD
AC
33_LV
DSB
DVSS
ADIN5
_SRV
ORESE
TB
33_VI
DEO_S PB1P
Y1P
COM1
M
N
NC
NC
NC
DVSS
DDRV
TP_AR
MPLL
DVSS
DVSS
DVSS
DVSS
DVSS
3_DEM
OD
3_XTA
L
33_US
B
OPCTR
L6
ADIN9
_SRV
ADIN8
_SRV
SOY1
RP
N
N
P
NC
NC
NC
NC
NC
DVSS
NC
NC
NC
NC
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
33_HD
MI
33_HD
MI
33_ET
H
ADIN1
_SRV
COM
GP
SOG P
R
NC
NC
NC
NC
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
OPCTR
L2
OPCTR
L0
OPCTR
L8
OPCTR
L1
HSYN
C
BP
R
R
T
NC
DVSS
NC
NC
NC
DVSS
DVSS
DDRV
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
OPCTR
L5
VSYN
C
VGA_S
CL
T
T
U
NC
NC
DVSS
NC
NC
NC
NC
NC
NC
DDRV
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
VCCK
DVSS
CPC0
POR_O
PT
OPCTR
L7
VGA_S
DA
ADIN7
_SRV
33_RG
B_STB
U
V
REF_A
1
NC
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
VCCK VCCK VCCK
CPC1
CPC2
10_LD
O
10_EL
DO
REXT V
V
W
ARDQ
4
ARDQ
C
V
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
N
T
R
A
S
S
V
D
S
S
V
D
S
S
V
D
6
CK VCCK VCCK
OPCTR
L3
TXVP_
0
TXVN
_0
W
Y
ARDQ
2
ARDQ
0
ARDQ
11
ARCL
K0
ARCL
K0#
DDRV
_CKA DVSS
DVSS
ARTP
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
VCCK VCCK VCCK
OPCTR
L9
OPCTR
L4
OIRI
33_PL
L_STB
RXVP_
1
RXVN
_1
Y
AA
ARRA
S#
ARCA
S#
ARCK
K
C
C
V
K
C
C
V
K
C
C
V
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
S
S
V
D
E
LED_P
WM1
LED_P
WM0
PHYLE
D1
33_RE
G_STB
USB_D
P_P3
USB_D
M_P3
AA
AB
ARDQ
15
ARDQ
13
ARDQ
9
ARCS
D#
ARCS#
AROD
T
ARWE
#
DDRV
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
VCCK VCCK VCCK
ASPDI
FO0
PHYLE
D0
DVSS
OPCTR
L11
OPWR
SB
AB
AC
ARDQ
S0
ARDQ
S0#
ARDQ
M1
DVSS
DVSS
DVSS
DDRV DDRV
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
VCCK VCCK VCCK VCCK V
CCK VCCK VCCK VCCK
OPCTR
L12
OPCTR
L17
OPCTR
L10
DVSS
STB_S
CL
STB_S
DA
AC
AD
ARDQ
M0
ARDQ
S1
DVSS
ARBA
0
ARBA
2
ARA10
DVSS
DDRV
DVSS
DVSS
DVSS
DVSS
DVSS
VCCK VCCK VCCK VCCK VCCK VCCK VCCK V
CCK
OPCTR
L16
OPCTR
L15
OPCTR
L20
OPCTR
L18
OPCTR
L19
A
AD
AE
ARDQ
S1#
ARBA
1
ARA0
DVSS
MEMT
P
AVSS_
DDR
10_DD
R
VCCK VCCK VCCK VCCK VCCK VCCK VCCK VCCK
OPCTR
L14
PAALE
U0TX
U0RX
AE
AF
ARDQ
8
ARDQ
12
ARDQ
14
ARA3 DVSS
ARA12 ARA2 DVSS
DVSS
MEMT
N
AVSS_
DDR
10_DD
R
PDD2
PDD1
POCE1
__B
LED_P
WM2
POCE0
__B
A
AF
AG
ARDQ
10
ARDQ
1
ARDQ
3
DVSS
ARA4 ARA1 ARA5 DVSS
OPCTR
L13
LED_P
WM3
PACLE
POWE
__B
A
AG
AH
ARDQ
7
ARDQ
5
ARA9 DVSS
DDRV DDRV
PDD3
PDD4
PARB_
_B
POOE_
_B
AH
AJ
ARDQ
20
REF_A
2
ARDQ
22
ARA7 ARA6 DVSS
DDRV
_CKB
DDRV DDRV DDRV
NC
PDD7
PDD6
PDD5
DVSS
PDD0
O_EM
MC
A
AJ
AK
ARDQ
18
ARDQ
16
ARDQ
27
ARRES
ET#
ARA13 ARA11 DDRV DDRV DDRV DDRV DDRV DDRV DDRV DDRV DDRV DDRV DDRV
TN_HP
CPLL
TP_HP
CPLL
DVSS
GPIO4
9
DVSS
DVSS
EMMC_R
STB
GPIO6
0
VCC3I
O_B
AK
AL
ARDQ
25
ARDQ
29
ARA8 DVSS
DDRV DDRV DDRV DDRV
DVSS
DVSS
BRTP
BRTN
TCON1
2
GPIO5
0
GPIO5
5
OPWM
1
AOSD
ATA2
6
EMMC
_CLK
AL
AM
ARDQ
M3
ARDQ
31
ARDQ
S2
ARA14 DDRV DDRV DDRV DDRV DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
TCON1 TCON3 TCON4 TCON8
TCON1
0
GPIO5
1
GPIO5
4
AOSD
ATA1
AOBC
K
AOSD
ATA3
5
GPIO59
U1RX U1TX A
AM
AN
ARDQ
S2#
ARDQ
M2
DVSS
BRCK
E
BRA10
BRBA1 BRA2
BRA7
BRA6
BRA14
TCON2
TCON9
TCON1
1
GPIO5
2
GPIO5
3
AOLR
CK
AOSD
ATA0
AOSD
ATA4
GPIO58 OSCL1 OSDA1
AN
AP
ARDQ
S3
ARDQ
S3#
ARDQ
28
DDRV DDRV
BRCL
K0
BRCAS
#
BROD
T
BRWE
#
BRBA0 BRBA2 BRA3
BRA5
BRA1
BRA9
BRA11 BRA8
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
AOMC
LK
OPWM
2
OPWM
0
A
AP
AR
ARDQ
24
ARDQ
30
ARDQ
23
BRDQ
11
BRCL
K0#
BRRAS
#
BRCS#
BRCSD
#
DVSS
BRA0
BRA12
BRDQ
M3
BRA4
DVSS
BRA13
BRRES
ET#
DVSS
BE4N
BE3N
BE2N
BE1N
BO4N BO3N BO2N BO1N AE4N
AE3N
AE2N
AE1N
AO4N AO3N AO2N AO1N
GPIO5
6
ASPDI
FI
A
AR
AT
ARDQ
26
ARDQ
17
BRDQ
4
DVSS
BRDQ
15
BRDQ
S0#
DVSS
BRDQ
S1
BRDQ
8
BRDQ
1
BRDQ
7
BRDQ
20
BRDQ
16
BRDQ
25
BRDQ
M2
BRDQ
S3#
BRDQ
30
BRDQ
19
BRDQ
21
BE4P
BE3P
BE2P
BE1P
BO4P
BO3P
BO2P
BO1P
AE4P
AE3P
AE2P
AE1P
AT
AU
ARDQ
19
ARDQ
21
BRDQ
2
BRDQ
0
BRDQ
9
BRDQ
S0
BRDQ
M0
BRDQ
S1#
BRDQ
10
BRDQ
3
BRDQ
5
BRDQ
18
BRDQ
27
BRDQ
29
BRDQ
S2#
BRDQ
S3
BRDQ
28
BRDQ
17
BRDQ
23
AVSS_
DDR
10_LV
DS
BECK
N
BE0N
BOCK
N
BO0N
AECK
N
AE0N
AOCK
N
AO0N
GPIO5
7
A
AU
AV
NC
REF_B
1
BRDQ
6
BRDQ
13
BRDQ
M1
BRDQ
12
BRDQ
14
REF_B
2
BRDQ
22
BRDQ
31
BRDQ
S2
BRDQ
24
BRDQ
26
10_DD
R
REXT_
VPLL
BOCK
P
BO0P
AOCK
P
AO0P
NC
AV
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
SD_D3K
DDRV
DDRV
DDRV
DVSS
DVSS
DDRV
DDRV
DDRV
AE0P
AECKP
BE0P
BECKP
AVDD
AVDD
DEMO
HDMI_ HDMI_ HDMI_ HDMI_ HDMI_
HDMI_
HDMI_
HDMI_
SD_D1
DDRV
AVDD
AVDD
AVDD
HDMI_ HDMI_
HDMI_
AVDD AVDD
ADCIN ADCIN
AVDD
HDMI_
HDMI_
DVSS
HDMI_ HDMI_ HDMI_ HDMI_ HDMI_ HDMI_ HDMI_ HDMI_
HDMI_ HDMI_ HDMI_ HDMI_ HDMI_ HDMI_ HDMI_ HDMI_
HDMI_ HDMI_ HDMI_ HDMI_ HDMI_
HDMI_
CI_A3
CI_TS
DEMO
DEMO
OSCL2
OSDA2
PVR_T
DEMO
PVR_T
DEMO DEMO
DEMO
DEMO DEMO
DEMO DEMO
HDMI_
HDMI_
VDAC
AVDD
OSCL0
OSDA0
AO1P
AO2P
AO3P
AO4P
AVDD
AVDD
DVSS
VCC3I
AVDD
AVDD AVDD
AVDD AVDD AVDD
AVSS3
AVSS3
AVDD
AVDD
AVDD
AVDD AVDD AVDD
AVDD
TCON0 TCON5 TCON6 TCON7
DVS
DVSS