Circuit Diagrams and PWB Layouts
10.
SMB: 32-bit DDR SDRAM
1
888
0_515_10100
8
.ep
s
101020
3
2-
b
it DDR
S
DRAM
B02
B02
2010-05-14
0.4
BUH NAFTA 2k10 v0.4
017G MB 4 ZW
3
2-
b
it DDR
S
DRAM
5
5
4
4
3
3
2
2
1
1
E
E
D
D
C
C
B
B
A
A
DDR01_A1
3
DDR01_BA1
DDR01_BA0
DDR1_CLK
b
DDR1_CLK
DDR1_C
Sb
_L_te
s
t
DDR01_CA
Sb
DDR01_RA
Sb
DDR01_WE
b
DDR01_CKE
DDR01_A0
DDR01_A1
DDR01_A11
DDR01_A12
DDR01_A10
DDR01_A
3
DDR01_A2
DDR01_A7
DDR01_A9
DDR01_A
8
DDR01_BA2
DDR01_ODT
DDR1_DQ
S
0
DDR1_DQ
S
0
b
DDR1_DM0
DDR1_A5
DDR1_A6
DDR1_A4
DDR0_DQ10
DDR0_DQ9
DDR0_DQ11
DDR0_DQ
8
DDR0_DQ15
DDR0_DQ1
3
DDR0_DQ14
DDR01_BA0
DDR0_DQ12
DDR01_A1
3
DDR01_BA1
DDR01_BA0
DDR0_CLK
b
DDR0_CLK
DDR0_C
Sb
_L_te
s
t
DDR01_CA
Sb
DDR01_RA
Sb
DDR01_WE
b
DDR01_CKE
DDR01_A0
DDR01_A1
DDR01_A11
DDR01_A12
DDR01_A10
DDR01_A
3
DDR01_A2
DDR01_A7
DDR01_A9
DDR01_A
8
DDR01_BA2
DDR0_VREF0
DDR01_ODT
DDR0_DQ
S
1
b
DDR0_DQ
S
1
DDR01_BA2
DDR0_DQ5
DDR0_DQ6
DDR0_DQ2
DDR0_DQ7
DDR0_DQ0
DDR0_DQ
3
DDR0_DQ4
DDR0_DQ1
DDR01_A1
3
DDR01_BA1
DDR01_BA0
DDR1_CLK
b
DDR1_CLK
DDR1_C
Sb
_H_te
s
t
DDR01_CA
Sb
DDR01_RA
Sb
DDR01_WE
b
DDR01_CKE
DDR01_A0
DDR01_A1
DDR01_A11
DDR01_A12
DDR01_A10
DDR01_A
3
DDR01_A2
DDR01_A7
DDR01_A9
DDR01_A
8
DDR01_BA2
DDR1_VREF0
DDR01_ODT
DDR1_DQ
S
1
DDR1_DQ
S
1
b
DDR0_DM1
DDR1_DM1
DDR1_A5
DDR1_A6
DDR1_A4
DDR01_BA0
DDR0_DQ
S
0
DDR0_DQ
S
0
b
DDR1_DQ5
DDR1_DQ6
DDR1_DQ7
DDR1_DQ
3
DDR1_DQ4
DDR1_DQ0
DDR1_DQ1
DDR1_DQ2
DDR0_DM0
DDR01_WE
b
DDR01_ODT
DDR1_VREF0
DDR01_A10
DDR01_A1
DDR01_A
3
DDR01_ODT
DDR01_BA1
DDR01_A1
3
DDR01_BA1
DDR01_BA0
DDR0_CLK
b
DDR0_CLK
DDR0_C
Sb
_H_te
s
t
DDR01_CA
Sb
DDR01_RA
Sb
DDR01_WE
b
DDR01_CKE
DDR0_VREF0
DDR01_A0
DDR01_A1
DDR01_A11
DDR0_A5
DDR01_A12
DDR01_A10
DDR01_A
3
DDR01_A2
DDR0_A6
DDR0_A4
DDR01_A7
DDR01_A9
DDR01_A
8
DDR01_BA2
DDR01_ODT
DDR01_A1
DDR01_BA1
DDR01_A10
DDR01_A
3
DDR01_WE
b
DDR1_DQ10
DDR1_DQ11
DDR1_DQ
8
DDR1_DQ15
DDR1_DQ1
3
DDR1_DQ14
DDR1_DQ9
DDR1_DQ12
DDR0_A5
DDR0_A6
DDR0_A4
DDR01_BA2
DDR01_A12
DDR01_A9
DDR01_A0
DDR01_A7
DDR01_A
8
DDR01_A11
DDR01_A1
3
DDR01_RA
Sb
DDR01_A2
DDR01_CA
Sb
DDR01_CA
Sb
DDR0_A6
DDR0_A5
DDR0_A4
DDR1_A5
DDR01_A12
DDR01_A9
DDR01_A11
DDR01_A1
3
DDR01_A7
DDR01_A
8
DDR1_A4
DDR01_A0
DDR01_RA
Sb
DDR01_A2
DDR1_A6
DDR0_DQ[15:0]
DDR0_D
Q
[15:0]
DDR1_DQ[15:
0
]
DDR1_DQ[15:
0
]
D1.
8
V_BCM
3
556
DDR_VTT
D1.
8
V_BCM
3
556
DDR0_VREF0
D1.
8
V_BCM
3
556
D1.
8
V_BCM
3
556
DDR0_VREF0
DDR1_VREF0
DDR1_VREF0
DDR_VTT
D1.
8
V_BCM
3
556
DDR0_DQ
S
1
[
3
]
DDR0_DQ
S
0
[
3
]
DDR0_CLK
b
[
3
]
DDR1_CLK
b
[
3
]
DDR1_CLK
[
3
]
DDR0_CLK
[
3
]
DDR0_DM1
[
3
]
DDR1_DM0
[
3
]
DDR1_DM1
[
3
]
DDR0_DM0
[
3
]
DDR0_DQ
S
1
b
[
3
]
DDR0_DQ
S
0
b
[
3
]
DDR1_DQ[15:0]
[
3
]
DDR0_DQ[15:0]
[
3
]
DDR1_DQ
S
1
[
3
]
DDR1_DQ
S
0
[
3
]
DDR1_DQ
S
1
b
[
3
]
DDR1_DQ
S
0
b
[
3
]
DDR01_A[1
3
:7]
[
3
]
DDR01_ODT
[
3
]
DDR01_CKE
[
3
]
DDR01_RA
Sb
[
3
]
DDR01_CA
Sb
[
3
]
DDR01_WE
b
[
3
]
DDR01_A[
3
:0]
[
3
]
DDR0_A[6:4]
[
3
]
DDR01_BA[2:0]
[
3
]
DDR1_A[6:4]
[
3
]
C2
3
470pF
C2
3
470pF
C44
470pF
C44
470pF
C20
0.1
u
F
C20
0.1
u
F
C47
0.1
u
F
C47
0.1
u
F
C
3
7
0.1
u
F
C
3
7
0.1
u
F
RN7
75
RN7
75
1
2
3
4
5
6
7
8
R11
100/1%
R11
100/1%
RN5
75
RN5
75
1
2
3
4
5
6
7
8
C
8
470pF
C
8
470pF
C41
47nF
C41
47nF
RN
8
75
RN
8
75
1
2
3
4
5
6
7
8
1G
b
DDR2
S
DRAM
12
8
Mx
8
U4
BGA60_9X11
NT5TU12
8
M
8
DE-BD 5
33
MHz
NC = L
3
,L7
1G
b
DDR2
S
DRAM
12
8
Mx
8
U4
BGA60_9X11
NT5TU12
8
M
8
DE-BD 5
33
MHz
NC = L
3
,L7
A0
H
8
A1
H
3
A2
H7
A
3
J2
A4
J
8
A5
J
3
A6
J7
A7
K2
A
8
K
8
A9
K
3
A10/AP
H2
A11
K7
A12
L2
DQ0
C
8
DQ1
C2
DQ2
D7
DQ
3
D
3
NF/DQ4
D1
NF/DQ5
D9
NF/DQ6
B1
NF/DQ7
B9
BA0
G2
BA1
G
3
CKE
F2
CK
E
8
CK
F
8
C
S
G
8
RA
S
F7
CA
S
G7
WE
F
3
VD
D
A1
VD
D
E9
VD
D
H9
VD
D
L1
VD
D
Q
A9
VD
D
Q
C1
VD
D
Q
C
3
VD
D
Q
C7
VD
D
Q
C9
V
SS
A
3
V
SS
E
3
V
SS
J1
V
SS
K9
V
SS
Q
A7
V
SS
Q
B2
V
SS
Q
B
8
V
SS
Q
D2
V
SS
Q
D
8
VD
D
L
E1
VREF
E2
DM/RDQ
S
B
3
V
SS
DL
E7
NC/RDQ
S
/NU
A2
DQ
S
B7
DQ
S
/NU
A
8
ODT
F9
A1
3
L
8
BA2
G1
R15
0
R15
0
RN1
75
RN1
75
1
2
3
4
5
6
7
8
C10
470pF
C10
470pF
R7
0
R7
0
C22
0.1
u
F
C22
0.1
u
F
C
3
2
10
u
F,6.
3
V
C
3
2
10
u
F,6.
3
V
RN9
75
RN9
75
1
2
3
4
5
6
7
8
RN2
75
RN2
75
1
2
3
4
5
6
7
8
+
EC
3
100
u
F/6.
3
V
+
EC
3
100
u
F/6.
3
V
+
EC1
100
u
F/6.
3
V
+
EC1
100
u
F/6.
3
V
RN6
75
RN6
75
1
2
3
4
5
6
7
8
1G
b
DDR2
S
DRAM
12
8
Mx
8
U2
BGA60_9X11
NT5TU12
8
M
8
DE-BD 5
33
MHz
NC = L
3
,L7
1G
b
DDR2
S
DRAM
12
8
Mx
8
U2
BGA60_9X11
NT5TU12
8
M
8
DE-BD 5
33
MHz
NC = L
3
,L7
A0
H
8
A1
H
3
A2
H7
A
3
J2
A4
J
8
A5
J
3
A6
J7
A7
K2
A
8
K
8
A9
K
3
A10/AP
H2
A11
K7
A12
L2
DQ0
C
8
DQ1
C2
DQ2
D7
DQ
3
D
3
NF/DQ4
D1
NF/DQ5
D9
NF/DQ6
B1
NF/DQ7
B9
BA0
G2
BA1
G
3
CKE
F2
CK
E
8
CK
F
8
C
S
G
8
RA
S
F7
CA
S
G7
WE
F
3
VD
D
A1
VD
D
E9
VD
D
H9
VD
D
L1
VD
D
Q
A9
VD
D
Q
C1
VD
D
Q
C
3
VD
D
Q
C7
VD
D
Q
C9
V
SS
A
3
V
SS
E
3
V
SS
J1
V
SS
K9
V
SS
Q
A7
V
SS
Q
B2
V
SS
Q
B
8
V
SS
Q
D2
V
SS
Q
D
8
VD
D
L
E1
VREF
E2
DM/RDQ
S
B
3
V
SS
DL
E7
NC/RDQ
S
/NU
A2
DQ
S
B7
DQ
S
/NU
A
8
ODT
F9
A1
3
L
8
BA2
G1
RN10
75
RN10
75
1
2
3
4
5
6
7
8
C52
0.01
u
F
C52
0.01
u
F
C16
0.1
u
F
C16
0.1
u
F
R12
75/1%
R12
75/1%
C51
470pF
C51
470pF
C14
0.1
u
F
C14
0.1
u
F
C
38
47nF
C
38
47nF
C12
0.1
u
F
C12
0.1
u
F
C
3
5
10
u
F,6.
3
V
C
3
5
10
u
F,6.
3
V
R
8
0
R
8
0
C5
3
0.01
u
F
C5
3
0.01
u
F
C4
3
0.1
u
F
C4
3
0.1
u
F
C
3
9
0.1
u
F
C
3
9
0.1
u
F
C4
8
470pF
C4
8
470pF
C9
10
u
F,6.
3
V
C9
10
u
F,6.
3
V
R1
3
75/1%
R1
3
75/1%
+
EC5
100
u
F/6.
3
V
+
EC5
100
u
F/6.
3
V
R9
75/1%
R9
75/1%
C40
47nF
C40
47nF
C6
10
u
F,6.
3
V
C6
10
u
F,6.
3
V
1G
b
DDR2
S
DRAM
12
8
Mx
8
U5
BGA60_9X11
NT5TU12
8
M
8
DE-BD 5
33
MHz
NC = L
3
,L7
1G
b
DDR2
S
DRAM
12
8
Mx
8
U5
BGA60_9X11
NT5TU12
8
M
8
DE-BD 5
33
MHz
NC = L
3
,L7
A0
H
8
A1
H
3
A2
H7
A
3
J2
A4
J
8
A5
J
3
A6
J7
A7
K2
A
8
K
8
A9
K
3
A10/AP
H2
A11
K7
A12
L2
DQ0
C
8
DQ1
C2
DQ2
D7
DQ
3
D
3
NF/DQ4
D1
NF/DQ5
D9
NF/DQ6
B1
NF/DQ7
B9
BA0
G2
BA1
G
3
CKE
F2
CK
E
8
CK
F
8
C
S
G
8
RA
S
F7
CA
S
G7
WE
F
3
VD
D
A1
VD
D
E9
VD
D
H9
VD
D
L1
VD
D
Q
A9
VD
D
Q
C1
VD
D
Q
C
3
VD
D
Q
C7
VD
D
Q
C9
V
SS
A
3
V
SS
E
3
V
SS
J1
V
SS
K9
V
SS
Q
A7
V
SS
Q
B2
V
SS
Q
B
8
V
SS
Q
D2
V
SS
Q
D
8
VD
D
L
E1
VREF
E2
DM/RDQ
S
B
3
V
SS
DL
E7
NC/RDQ
S
/NU
A2
DQ
S
B7
DQ
S
/NU
A
8
ODT
F9
A1
3
L
8
BA2
G1
C29
0.01
u
F
C29
0.01
u
F
R10
100/1%
R10
100/1%
C2
8
0.01
u
F
C2
8
0.01
u
F
C
3
4
470pF
C
3
4
470pF
C17
47nF
C17
47nF
C46
0.1
u
F
C46
0.1
u
F
C49
0.01
u
F
C49
0.01
u
F
R16
0
R16
0
C11
0.1
u
F
C11
0.1
u
F
C
3
6
470pF
C
3
6
470pF
C
3
0
0.01
u
F
C
3
0
0.01
u
F
RN
3
75
RN
3
75
1
2
3
4
5
6
7
8
C19
47nF
C19
47nF
C21
47nF
C21
47nF
1G
b
DDR2
S
DRAM
12
8
Mx
8
U
3
BGA60_9X11
NT5TU12
8
M
8
DE-BD 5
33
MHz
NC = L
3
,L7
1G
b
DDR2
S
DRAM
12
8
Mx
8
U
3
BGA60_9X11
NT5TU12
8
M
8
DE-BD 5
33
MHz
NC = L
3
,L7
A0
H
8
A1
H
3
A2
H7
A
3
J2
A4
J
8
A5
J
3
A6
J7
A7
K2
A
8
K
8
A9
K
3
A10/AP
H2
A11
K7
A12
L2
DQ0
C
8
DQ1
C2
DQ2
D7
DQ
3
D
3
NF/DQ4
D1
NF/DQ5
D9
NF/DQ6
B1
NF/DQ7
B9
BA0
G2
BA1
G
3
CKE
F2
CK
E
8
CK
F
8
C
S
G
8
RA
S
F7
CA
S
G7
WE
F
3
VD
D
A1
VD
D
E9
VD
D
H9
VD
D
L1
VD
D
Q
A9
VD
D
Q
C1
VD
D
Q
C
3
VD
D
Q
C7
VD
D
Q
C9
V
SS
A
3
V
SS
E
3
V
SS
J1
V
SS
K9
V
SS
Q
A7
V
SS
Q
B2
V
SS
Q
B
8
V
SS
Q
D2
V
SS
Q
D
8
VD
D
L
E1
VREF
E2
DM/RDQ
S
B
3
V
SS
DL
E7
NC/RDQ
S
/NU
A2
DQ
S
B7
DQ
S
/NU
A
8
ODT
F9
A1
3
L
8
BA2
G1
C24
470pF
C24
470pF
C45
47nF
C45
47nF
C26
0.01
u
F
C26
0.01
u
F
C54
0.01
u
F
C54
0.01
u
F
C
3
1
10
u
F,6.
3
V
C
3
1
10
u
F,6.
3
V
C55
0.01
u
F
C55
0.01
u
F
+
EC2
100
u
F/6.
3
V
+
EC2
100
u
F/6.
3
V
C50
470pF
C50
470pF
C27
0.01
u
F
C27
0.01
u
F
C56
0.01
u
F
C56
0.01
u
F
C1
8
470pF
C1
8
470pF
C7
10
u
F,6.
3
V
C7
10
u
F,6.
3
V
C1
3
47nF
C1
3
47nF
RN4
75
RN4
75
1
2
3
4
5
6
7
8
R14
75/1%
R14
75/1%
C42
0.1
u
F
C42
0.1
u
F
+
EC4
100
u
F/6.
3
V
+
EC4
100
u
F/6.
3
V
C
33
10
u
F,6.
3
V
C
33
10
u
F,6.
3
V
C15
470pF
C15
470pF
C25
0.01
u
F
C25
0.01
u
F
C5
10
u
F,6.
3
V
C5
10
u
F,6.
3
V