Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.
9.4.6
Diagram A7, TDA9850, (IC801)
Figure 9-7 Block Diagram and Pin Configuration
composite
baseband
input
+
+
C2
13
14
15
C5
16
Q1
ceramic
resonator
17
DEMATRIX
+
MODE
SELECT
+
C6
18
+
C7
19
DE-EMPHASIS
L + R
L
−
R/SAP
OUTL
OUTR
27
21
STEREO DECODER
SAP without DBX
23
C8
22
R1
C3
C4
LOGIC, I
2
C-
TRANSCEI
V
ER
MAD
28
7
stereo
mono
SAP
to
audio
processing
9
8
SDA
SCL
SUPPLY
+
C18
24
6
+
C19
12
10
V
ref
V
CAP
V
CC
SAP
DEMODULATOR
+
C16
5
C15
4
INPUT
LE
V
EL
ADJUST
+
11
C1
NOISE
DETECTOR
STEREO/SAP
SWITCH
C17
26
TDA9850
STEREO
ADJUST
DBX
+
C14
3
C13
R3
R2
1
2
+
32
+
31
+
30
+
29
C12 C11 C10 C9
+
25
+
20
C
L
C
R
only during
adjustment
TDA9850
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
EO
CS
CW
CTS
CTW
CND
CSDE
CL
CR
CSS
CMO
V
ref
V
EI
CNR
CM
CDEC
L
T
U
O
D
N
G
A
SAP
OUTR
CER
MAD
DGND
SDA
SCL
V
CC
COMP
V
CAP
CP1
CP2
CPH
CADJ
Block Diagram
Pin Configuration
H_17450_004.eps
200907
