Appendix B: Post Codes
B-2
9
Early Cache
Initialization
Cyrix CPU initialization.
Cache initialization.
A
Setup Interrupt
Vector Table
Initialize first 120 interrupt vectors with
SPURIOUS_INT-HDLR and initialize INT 00h-1Fh
according to INT_TBL.
B
Test CMOS RAM
Checksum
Test CMOS RAM Checksum, if bad, or insert key
pressed, load defaults.
C
Initialize keyboard
Detect type of keyboard controller (optional).
Set NUM_LOCK status.
D
Initialize Video
Interface
Detect CPU clock.
Read CMOS location 14h to find out type of video in
use.
Detect and Initialize Video Adapter.
E
Test Video Memory
Test video memory, write sign-on message to screen.
Setup shadow RAM - Enable shadow according to
Setup.
F
Test DMA
Controller 0
BIOS checksum test.
Keyboard detect and initialization.
10
Test DMA
Controller 1
11
Test DMA Page
registers
Test DMA Page Registers.
12-13
Reserved
14
Test Timer Counter
2
Test 8254 Timer 0 Counter 2.
15
Test 8259-1 Mask
Bits
Verify 8259 Channel 1 masked interrupts by alternately
turning off and on the interrupt lines.
16
Test 8259-2 Mask
Bits
Verify 8259 Channel 2 masked interrupts by alternately
turning off and on the interrupt lines.
17
Test Stuck 8259's
Interrupt Bits
Turn off interrupts then verify no interrupt mask
register is on.
18
Test 8259 Interrupt
Functionality
Force an interrupt and verify the interrupt occurred.
19
Test Stuck NMI
Bits (Parity/IO
Check)
Verify NMI can be cleared.
1A
Display CPU clock.
1B-1E
Reserved
1F
Set EISA Mode
If EISA non-volatile memory checksum is good,
execute EISA initialization. If not, execute ISA tests an
clear EISA mode flag.
Test EISA Configuration Memory Integrity (checksum
& communication interface).
20
Enable Slot 0
Initialize slot 0 (System Board).
