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PHD Packager Manual
V
Publication History
The following table provides an overview of the changes made to this document over the course of its
publication history.
Release
Description of Change, Date
Rev. 001
First release of this document, 2/10/2016
Rev. 002
Updated per Bus. Dev. feedback, 3/3/2016
Rev. 003
Incremental updates from case 30666 reviews 4/6/2016 and 6/27/2016
Rev. 004
Edits based on case 30666 7/11/2016 review and 1042F06 specification
Rev. 005
Edits based on case 30666 9/12/2016 review
Rev. 006
Inputs, outputs and 5V / 12V power supply outputs, pin naming changed,
1/11/2017
Rev. 007
Remove references to Advanced versions per Sales and Marketing request.
Will launch at a later date.
Rev. 008
Label pins in C2 as reserved for PHD50/PHD70
Rev. 009
Add SERF Development board section
Rev. 010
High-side/low power output and low-side output specification update.
Rev. 011
Changed PHD70 brightness specification.
Rev. 012
Minor edit to Power section
Rev. 013
Added RS232 debugging pin names to PHD50/70 connector C2 pin-out
Rev. 014
Minor edits to SERF board section.
Rev. 015
Minor edit to Power section.
Rev. 016
Minor edit to PHD70 feature table and Environmental protection section,
1/29/2018
Rev. 017
Removed reference to Digital inputs from PHD28/50, added USB file loading
and Recovery switch information.
Rev. 018
Edits per Product Manager markups 3/2019 and 6/2019
Rev. 019
Added Development cable to Chapter 8, 12/4/2019
Rev. 020
Changed digital and frequency inputs PHD50/PHD70, 2/26/2020
Rev. 021
Changed wake functionality text in Sections 3.1, 3.2, 3.3, changed CAN
termination in Section 6.1.2, added RTC section 7.6, 4/7/2020.
Rev. 022
Minor edits to Connectors pin names and Input section, 4/29/2020