7.2. HSB-Board Block Diagram
H
V
F
F
V
H
TDI
TCK
TDO
CS
TDO
TDI
TMS
TCK
1
2
3
4
TP3402
TP3401
D3303
+3.3V_A
D3304
+3.3V_A
+1.8V
+1.5V
+3.3V_A
+3.3V
+3.3V_A
+3.3V_B
+3.3V_A
+3.3V_A
+3.3V_A
+3.3V_A
TP3403
+3.3V_A
TP3301
TP3501
SDI INPUT
JK3301
EQUALIZER
4
SERIAL IN
13
12
SERIAL
DATA[2]
8
6
SDI OUTPUT
JK3302
SERIAL OUT
DESERIALIZER(S->P)
M_SD/HD
S352_CHK
AUTO/MANU
72
BUFFER
2
5
6
2
5
6
BUFFER
31
S2P[0-19]
20bit data bus
38
63
69
P_CLK
LVDS_CLK
FPGA
S2P[0-19]
DATA ERROR
PLL LOCK
3
2
5
4
1
H2
Y[0-9]
Pb[0-9]
Pr[0-9]
55
33
57
Pr[0-9]
38
Pb[0-9]
Y[0-9]
59
61
S2P[0-19]
LVDS_TX
12
13
ERR
INIT
VD
HD
HD
VD
/PD
WN(H:NO
ARMAL)
CLK
5
8
6
EEPROM
A22
B24
B25
6
7
2
H1
B11
23
B12
22
B14
21
20
B15
B8
25
24
B9
B5
29
28
B6
B2
31
30
B3
H0
TXA0
TXA1
TXB1
TXB0
TXC1
TXC0
TXD1
TXD0
TXCLK1
TXCLK0
STBY+5V
IIC DAT
IIC SCL
B19
A19
SLOT5V
B17
A17
SLOT3.3V
1
AVR+1.5V
3
5
+2.5V
+3.3V_A
VD
HD
7
8
VCC
SDA
SCL
WP
R/F
4
5
11
9
48
54
64
1
8
40
46
62
63
6
60
3
3
D_ERR
LOCK
SW3301
1:LVDS_CLK
2:S352_CHK
3:AUTO/MANU
4:M_SD/HD
SW3301
P
A
RALLEL T
O
SERIAL
PLL
10Bit
10Bit
10Bit
RESET
4
PROM(FPGA)
25
71
1
FOR
FACTORY
USE
FOR
FACTORY
USE
TO
SLOT1,
SLOT2
7
2
1
BUFFER
6
3
5
18
SMPTE
DVB_ASI
9
5
VCC
VOUT
RESET
MASTER/SLAVE_L
PCLK
34
F
V 35
36
H
SDOUT_TDO 28
29
SCLK_TCK 30
SDIN_TDI
CS_L_TMS 27
73
X3301
VCO
TCK
TDO
TDI
TMS
F
H
V
DDI-1-P
DDI-1-N
VCC
SDI_P
SDO_P
SDO_N
SDO_P
SDO_P
SDI_P
24
OUTPUT DRIVER
8
1
2
SERIAL
DATA[2]
SDI_N
TA+
TA-
TB-
TB+
TC-
TC+
TD-
TD+
TCLK+
TCLK-
A2
19
18
A3
TE+
TE-
TXE1
TXE0
LVDS_
VCC
PLL_
VCC
VCC
M_SD/HD
S352_CHK
AUTO/MANU
CLK
23
SDO_N
VDD
CE
VOUT
VCONT
VIN
1
AVR+3.3V
5
4
+3.3V_B
VOUT
VCONT
4
1
VIN
+1.8V
5
AVR+1.8V
VOUT
SLOT3.3V
SLOT5V
B28
IC3303
IC3402
IC3404
IC3304
IC3302
IC3307
IC3306
IC3305
IC3403
IC3405
IC3501
IC3502
IC3503
B23 SRQ
VCO_P
PLUG_DET
IC3310
8
+9V
B21
A21
+9V
+9V
VCC
OUT
AVR+1.2V
+1.2V
3
IC3504
5
IC3409
CLOCK
GEN
6
3
2
5
LEVEL SHIFT
IC3408
SD
A
SCL
3.3V
TCK
TMS
TDO
TDI
+3.3V
IC3406
BUFFER
BUFFER
IC3407
A28
A26
R
L
Q3602
Q3604
7
1
7
1
AIN+
BIN+
AOUT
BOUT
L
R 12
11
SDI
3
AUDIO DAC
IC3410
AMP
IC3411
Q3605
Q3601
Q3603
MUTE
A
UDIO
TY-FB10HD
HSB-Board Block Diagram
TY-FB10HD
HSB-Board Block Diagram
+2.5V
FPGA PROG
4
5
VCC
VOUT
IC3401
TY-FB10HD / TY-FB10HDC
12
Summary of Contents for TY-FB10HD
Page 5: ...4 Replacement 5 TY FB10HD TY FB10HDC ...
Page 6: ...5 Connection 6 TY FB10HD TY FB10HDC ...
Page 7: ...7 TY FB10HD TY FB10HDC ...
Page 10: ...10 TY FB10HD TY FB10HDC ...
Page 11: ...7 1 Schematic Diagram Notes 7 Block and Schematic Diagram TY FB10HD TY FB10HDC 11 ...
Page 16: ...TY FB10HD TY FB10HDC 16 ...
Page 17: ...8 Exploded Views Replacement Parts List 8 1 Parts Location 1 17 TY FB10HD TY FB10HDC ...
Page 18: ...8 2 Parts Location 2 18 TY FB10HD TY FB10HDC ...
Page 19: ...8 3 Replacement Parts List Notes 19 TY FB10HD TY FB10HDC ...