14.10. HDD-Board Block Diagram
RX1-
RX1+
RX0+
RX2+
RX2-
RX0-
19
11
78
79
52
63
76
123
33
54
128
15
99
126
34
90
45
20
75
27
11
23
32
73
41
+5V
64
LAN15V
46
69
41
97
57
3
119
77
24
46
43
53
94
60
51
17
62
5
96
59
31
122
44
22
120
80
30
52
92
20
65
58
121
47
75
27
70
47
13
55
JK3501
74
14
56
14
83
40
10
104
55
127
85
3
49
93
26
91
81
36
+3.3V
61
48
39
2
37
42
10
56
37
44
30
48
JK3001
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
98
72
106
40
21
60
35
9
74
+9V
86
4
STB+5V
63
54
50
124
53
38
77
71
86
16
59
66
8
34
1
99
51
12
25
TX3-
5
TX7+
7
9
TX3+
PWDDNB
TX6+
7
B1
TX9-
TX0-
VCC
TMDS_RX1-
TX3-
B21
5
EVEN_B2
SLOT_SDA
TX8-
TXOB0
PRESET
3
ODD_B7
TX5+
TXC-
ODD_R1
VCC
11
ODD_G0-G7
T
EVEN_R0-R7
A4
AUDIO_L
A15
S_DATA2
B9
TXED5
+5V
+
S_CLOCK2
WP(EDID)
TX0+
SCL
ODCK
B11
EVEN_B3
TXOD+
DVI_SDA
TX2-
A40
ODD_B4
TXED0
TX4+
5
IC3901
TX3+
VCC
TX5-
TX2+
B14
EVEN_B2
16
TXEA4
EVEN_B0-B7
TX9+
TX1+
TXOC0
6
TXOD4
/OE2
SRQ
ODD_R5
WP(CONFIG)
TXOC+
8
Q3501
TX7+
TX1+
L
VDS_PD
DVI_SCL
DDC+5V
MODE0
ODD_B2
+5V
B5
A26
B19
DE
EVEN_G7
ODD_G7
EVEN_B6
A17
TX4-
TXEE-
H0
EEPROM
TXEA5
TX5+
TXOB5
B8
TX6-
7
L
ODD_G2
B6
A8
15
EVEN_B1
TXEA0
14
B39
ODD_G0
SDA0
AUDIO_R
-
7
TXOA+
HSYNC
EVEN_B4
VCC
TX6+
B24
TXC+
B3
IC3101
3
ODD_R0-R7
TXEC1
IC3105
8
ODD_R6
DVI_SDA
EVEN_B1
TX6+
A3
5
SCL_HDCP
TXOB-
TX4-
SLOT_SCL
TCLKIN
TXEE+
H1
A9
B2
B2
2
ODD_R0
VSYNC
EVEN_B4
TX9+
A2
TXOE+
TXED3
A1
7
SDA1
6
TXEC-
TXEC0
TX8-
EVEN_B5
A22
5
TXED-
TMDS_RX0-
TX6-
TCLKOUT-
TX8+
(3.3V <-> 5V)
TXED2
TXC-
TX3+
TXEB5
TXEC2
SCL
A21
IC3902
LATCH
T
TX0+
EVEN_B6
A12
1
DE
PLL
SCL1
(3.3V <-> 5V)
WP
TXEB-
B1
DVI IN
TXOE-
DVI AUDIO IN
T
TXC-
6
C_SCL
7
TX0-
ODCK
A14
TXEB+
HSYNC
8
TX2-
TXEC5
EVEN_B0
HSYNC
B40
EVEN_G0-G7
TXEA-
TXOA0
3
ODD_R3
ODD_G3
EVEN_G3
SYNC_DET
IC3201
SDA1
A5
6
EVEN_B5
FHD:H
A2
SCL
SDA
LVDS TX
VSYNC
TXOB6
SDA
6
ODD_R7
EVEN_G5
TXOD1
P3
C_SDA
P6
ODD_B3
TXEC3
TXOA5
ODD_B5
TX2-
SDA
TX0-
TX8+
TX9-
IC3906
B23
+3.3V
TXOC-
+
ODD_G1
EVEN_G6
TMDS_RXC-
DVI I/F, HDCP
WP
1
+9V
TX1-
DVI_SCL
+9V
ODD_B0
R
STB+5V(
SCL0
TXEA+
+3.3V
LAN+15V
SLOT_SCL
Q3100,Q3101
EEPROM
LATCH
5
TXEC4
TX5+
ODD_G5
EVEN_G4
B15
IC3102
DE
STB 5V
6
A23
TXOD0
TXC+
TX7-
TXOB+
2
TX7-
TXEA6
+3.3V
A7
TXOB5
+
TX6-
EVEN_B7
+5V
RESR
VD
EVEN_B7
3
TX4-
FHD:H
+5V
-
IC3001
+3.3V
(3.3V <-> 5V)
SLOT_SDA
ODD_G6
LAN+15V
7
+
-
TMDS_RX2-
2
TXOA-
A28
TXED1
EVEN_B0
+5V
TXOC3
EVEN_G1
TX5-
2
ODD_B1
A19
DVI_SCL
TXC+
B12
DVI_SDA
STB+5V
IC3103
T
TX7-
TX9-
SDA_HDCP
TX1-
TX7+
TXEB0
EVEN_B3
AUDIO_R
DS12
8
6
4
VCC
TXOD-
TX4+
EVEN_G2
TXOD5
TXEC+
TXEB6
B25
C_SCL
-
LATCH
TX4+
TX3-
TX8-
TXEC6
ODD_R2
EVEN_G0
TX9+
DVI_SDA
TX2+
AUDIO_L
A1
STB+5V
TX0+
VSYNC
TXED+
SCDT
SCL1
TX1+
B2
LVDS_PD
ODD_G4
8
B17
TX5-
Q3511
ODD_R4
TXED4
ODD_B0-B7
TX1-
DVI_SCL
TXOD3
FHD/SD,HD
P2
A13
TXOD2
C_SDA
SCL_EQ
ODCK
A2
SDA_EQ
ODD_B6
TX2+
8
TX8+
A10
PRESET
HDD DVI IN
PANEL
INTERFACE
AND
SYNCHRONIZATION
DECODER
LEVEL SHIFT
LEVEL SHIFT
TMDS
DATA RECOVERY
AUDIO_R
AUDIO_L
PLUG DET
BUFFER
LEVEL SHIFT
IIC BUS REPEATER
TH-50PF9UK
HDD-Board Block Diagram
TH-50PF9UK
HDD-Board Block Diagram
TH-50PF9UK
82
Summary of Contents for TH50PF9UK - 50" Plasma Panel
Page 4: ...1 Applicable signals 4 TH 50PF9UK ...
Page 19: ...7 Location of Lead Wiring 19 TH 50PF9UK ...
Page 20: ...20 TH 50PF9UK ...
Page 21: ...21 TH 50PF9UK ...
Page 24: ...8 4 Adjustment Volume Location 8 5 Test Point Location 24 TH 50PF9UK ...
Page 29: ...9 2 IIC mode structure following items value is sample data 29 TH 50PF9UK ...
Page 31: ...31 TH 50PF9UK ...
Page 33: ...33 TH 50PF9UK ...
Page 39: ...12 Option Setting 39 TH 50PF9UK ...
Page 72: ...TH 50PF9UK 72 ...
Page 73: ...14 Block and Schematic Diagram 14 1 Schematic Diagram Note TH 50PF9UK 73 ...
Page 139: ...15 Parts Location 15 1 Exploded View 15 1 1 The main mechanical parts relation 139 TH 50PF9UK ...
Page 141: ...15 3 Cable relation 141 TH 50PF9UK ...
Page 142: ...15 4 Packing summary 142 TH 50PF9UK ...
Page 143: ...143 TH 50PF9UK ...
Page 144: ...144 TH 50PF9UK ...
Page 145: ...145 TH 50PF9UK ...
Page 147: ...17 Replacement Parts List 17 1 Replacement Parts List Notes 147 TH 50PF9UK ...