Panasonic SDR-S45EG, Service Manual

Page: 62 / 105

S-49
INITIAL/LOGO ABBREVIATIONS
CPDT CPU Data
CPN Component Signal
CPOB Clamp Pulse for Optical Blanking
CPRD CPU Read Enable
CPS Composite Signal
CPUADR CPU Address Latch
CPUADT CPU Address Data Bus
CPUIRQ CPU Interrupt Request
CPV Gate Scan Clock
CPWR CPU Write Enable
CR OUT Pre Apature Out
CR POW SW Camera Remote Power ON Switch
CRA Aperture Gain Control
CRA Pre Apature Gain Control
CRST Camera Reset
CS Chip Select
CS 0-7 Chrominance Signal Out
CSEL Clock Phase Select
CSI 0-7 Chrominance Signal In
CSYNCIN Composite Sync In
CSYNCOUT Composite Sync Out
CTSW Crosstalk Switch
CURR Current
CW Clockwise
D D CLK Digital Clock
D MODE Digital Mode Switch Signal
D01-03 Zoom 01-03
DA UV SEL D/A Convertor U/V Select
DAC Digital Analogue Converter
DACCK D/A Converter Clock
DAG Digital Analogue Ground
DB0-7 Microprocessor Data
DCC DC Clamp Control
DCCNT DC Control
DCI Digital Channel Cording IC
DCLR Digital Clear
DCP Digital Clamp Pulse
DCS-CLK, DA CAS & DV I/F Serial Clock
DC-STP1 DCS Serial Start
DC-STP2 DCS Serial Stop
DCT Discrete Cosine Transform (Compression)
DCX7 Serial Data
DEEMP Deemphasis bit ON/OFF
DEMO Demodulation
DEMP A/D Convertor Empahsis Control
DEMP De-Emphasis