42,44
22
DV
SS
AV
SS
TEST1
41
45
34
32
33
28
C1BB00000692
IC1012
DIGITAL AUDIO TRANSCEIVER
24-bit
DSP PROCESSING
RAM
PROGRAM
MEMORY
RAM
DATA
MEMORY
STC
RAM
INPUT
BUFFER
PLL
CLOCK MANAGER
D
A
T
A0~7
8~11,
14~17
CMP DAT
27
CMP CLK
28
CMP REQ
29
25
SCLK N1
26
LRCLK N1
22
SDATA N1
CLK IN
CLK SEL
30
31
DGND2
DGND1
DGND3
V
D
2
V
D
1
V
D
3
FIL
T2
FIL
T1
32
33
13
2
24
12
1
23
MCLK
44
SCLK
43
LRCLK
42
AU DATA0
41
AU DATA1
40
AU DATA2
39
XMT958
3
C2HBZJ000001
IC1002
AC3/DTS/AAC
13
21
TV
DD
DV
DD
25
SCD
OUT
19
EMWR
4
EXTMEN
21
20
INTREQ
5
EMOE
SCDIN
6
SCCLK
7
CS
18
RESET
36
C0JBAZ001003
IC1010
LOGIC CONTROL
C0JBAZ001437
IC1011
LOGIC CONTROL
INTREQ
SDT
O
XTI
30
PDN
31
X1002
(23.578MHz)
SCLK
SCLK
LRCK
LRCK
+5VD
CCLK
CDT
O
CDTI
DAUX
CCLK
CDT
O
CD
IN
DIRINT1
DIRINT0
ADOSR0
ADOSR1
ADOSR1
ADOSR0
DIRINT0
DIRINT1
19
20
22
21
ADRST
18
ADRST
INTREQ
INTREQ
9
AKRST
8
AKRST
CSAK
CSAK
7
+2.5VD
46
RX0,1
RX2
+5VD
Q1001
OSC
PW
AGND
35
VA
+2.5VD
34
POWER
SUPPLY
+2.5VD
DIGITAL
AUDIO INPUT
INTERFACE
FRAMER
SHIFTER
ROM
PROGRAM
MEMORY
RAM
DATA
MEMORY
INPUT
BUFFER
CONTROLLER
RAM
OUTPUT
BUFFER
OUTPUT
FORMA
TTER
PARALLEL OR SERIAL HOST INTERFACE
COMPRESSED
DATA INPUT
INTERFACE
SPDIF
RECEIVER
1
CA18
ROM
CE
4
MCKSEL
MCKSEL
2,3,
5
CA15~17
CA15~17
26
BICK
24
LRCK
+3.3VD
38
AV
DD
+3.3VD
TC7WH157FUTL
IC1016
CLOCK SELECTOR
27
MCKO2
MCKSEL
AKRST
INVER-
TER
C0JBAB000423
IC1017
TC7WH74FUTL
IC1009
FLIP FLOP
X1001
(24.576MHz)
TRIPLE
INVERTER
C0JBAB000371
IC1007
TC7WH157FUTL
IC1008
CLOCK SELECTOR
C0JBAF000464
IC1004
LOGIC CONTROL
C0JBAZ001539
IC1003
LOGIC CONTROL
C3BDNC000075
IC1001
LOGIC CONTROL
C0JBAF000464
IC1005
LOGIC CONTROL
35
CSN
CSAK
36
INT0
DIRINT0
37
INT1
DIRINT1
39
R
40
VCOM
+2.5VD
XOUT
XIN
15
14
CF1001
(4MHz)
CS15~17
ROM CE
10
RESET
M
RST
D1002
11
ENC1
12
ENC2
16
V
DD
SW5V
17
MUTE
MUTE
23
HOLD
SW5V
24
AMPCNT
AMPCNT
28
-VP
57
INIT
68
SIN
MS
O
66
SCLK
MC
K
67
SOUT
MS
I
CDT
O
CDT
O
25
CDIN
CCLK
CS49
CDIN
CCLK
CS49
70
71
69
OVFR
OVFL
SCDOUT
OVFR
OVFL
SCDOUT
26
27
72
74
VREF
SW5V
73
AV
SS
75
DECOUT
DECOUT
76
REQM
AAC
RQM
78
REQS
AAC
RQS
OSC
PW
79
OSC
PW
CSRESET
80
CSRESET
C2BBFE000123
IC1014
DSP
SERIAL
AUDIO
PORT
19
SDIN
18
LRCLK
17
SCLK
DIGITAL
INTERPOLATION
FILTER
EQUIBIT
MODULATOR
BUFFER
PWM AP L
35
PWM AM L
34
PWM BP L
32
PWM BM L
33
CONTROL SECTION
AUDIO PORT
CONFIGURATION
MOD0
22
MOD1
21
MOD2
20
DEM
SEL
42
DEM
EN
43
MUTE
38
RESET
7
PDN
8
FTEST
41
PWM AP R
29
PWM AM R
28
PWM BP R
26
PWM BM R
27
STEST
40
DBSPD
39
DVDD1/2
12,
14,
31
DVSS1/2
36
(25)
13,
15,
30
DVDD3
L(R)
DVSS3
L(R)
37
(24)
A
VDD1/2
48,
2
A
VSS1/2
44,
5
PLL/CLOCK
GENERATOR
PLL
FLA
T
RET
4
PLL
FLA
T
OUT
3
MCLK
IN
1
V
ALID
L
23
V
ALID
R
9
OSC
XTL
IN
XTL
OUT
OSC
CAP
47
46
45
VOLTAGE
COMPARATOR
C0BBCA000040
IC105
+B2
+B2
MS
10
C0JBAA000149
IC102
C0JBAA000149
IC103
BCLK
LRCLK
MCLK
C0ZBZ0000654
IC101
DIGITAL AUDIO AMPLIFIER
D101,102
F+
F-
C0JBAC000262
IC104
MUTE HP
C0JBAZ001127
IC110
DBSPD
RESET
C0EBE0000200
IC609
AMPRESET
+B2
VR901
(VOLUME)
MUTE F
23
MCKO1
SA-XR10(E,EB,EG,GCS,GD,GN) BLOCK DIAGRAM
MCLK
BCLK
LRCLK
+5VD
SCDOUT
CS49
CSRESET
MCLK
11
XTL1
+3.3VD
+5VD
L817
DIGITAL
IN
OPT 1/2
COAXIAL
+B2
+B2
+B2
+B2
DUAL BUS
BUFFER
DUAL BUS
BUFFER
C0JBAZ001127
IC111
R ch
MUTING
CONT.
Q617
RESET F
+B2
Summary of Contents for SA-XR10E
Page 7: ...7 ...
Page 8: ... Check the main P C B and DSP P C B A side as shown below 8 ...
Page 9: ... Check the DSP P C B B side as shown below 9 ...
Page 10: ...6 2 Checking for the input output terminal P C B Follow the Step 1 Step 6 of item 6 1 10 ...
Page 12: ...12 ...
Page 13: ...13 ...
Page 14: ...14 ...
Page 15: ... Check the power supply P C B as shown below 15 ...
Page 21: ...25 RDS_CLK I RDS clock signal input 26 RDS_DATA I RDS data signal input 21 ...
Page 26: ...C164 F1J2E103A005 250V 0 01U 1 26 ...
Page 35: ...IC506 07 C1ZBZ0002016 IC 2 35 ...
Page 50: ... ...
Page 51: ......
Page 52: ......