66
16.2. MAIN(1) CIRCUIT (2/4)
1
P
2
2
P1
TO M
A
IN(1)
S
ECTION (1/4)
TO M
A
IN(1)
S
ECTION (4/4)
A
M
A
IN(1) CIRCUIT
S
CHEM
A
TIC DI
A
GR
A
M -
2
MW-
2
0EB/EG M
A
IN(1) CIRCUIT
2
/4
4/4
1/4
3/4
: +B
S
IGN
A
L LINE
:
S
D/U
S
B
S
IGN
A
L LINE
:
A
UDIO OUTPUT
S
IGN
A
L LINE
:
V
IDEO OUTPUT
S
IGN
A
L LINE
15
1
6
1
7
18
19
2
0
2
1
22
2
3
2
4
2
5
26
27
2
8
A
C
D
B
E
G
H
F
LB10
2
1
J
0
J
HC0000045
V
DEC_
Y
OUT
7
V
DEC_
Y
OUT5
V
DEC_
Y
OUT3
V
DEC_
Y
OUT4
V
DEC_
Y
OUT
6
A
RM_
A2
1
DDR_B
A
0
DDR_B
A
1
B3
DDR_B
A
1
A
RM_
A2
0
M3
A
RM_
A2
1
B
2
DDR_B
A
0
M4
A
RM_
A22
A
RM_D1
2
DDR_D3
DDR_D5
A
RM_D13
DDR_D4
DDR_D4
B14
DDR_D4
H
2
A
RM_D13
A
RM_D9
J
3
A
RM_D10
A
RM_D10
DDR_D0
DDR_D
7
DDR_D1
B13
DDR_D1
A
13
DDR_D3
DDR_D
2
DDR_D
6
H1
A
RM_D1
2
A
RM_D11
J
4
A
RM_D11
C14
DDR_D
2
R4
A
RM_
A
10
A
RM_
A
10
DDR_D1
2
DDR_
A
3
B
7
DDR_
A
3
DDR_
A2
A
RM_
A
9
R3
A
RM_
A
9
A7
DDR_
A2
DDR_D14
A
RM_
A
1
2
DDR_
A
5
P
2
A
RM_
A
1
2
B
6
DDR_
A
5
DDR_D13
A
RM_
A
11
DDR_
A
4
A6
DDR_
A
4
P1
A
RM_
A
11
DDR_D15
DDR_D1
A
RM_
A
5
T3
A
RM_
A
5
B10
DDR_D15
DDR_D9
DDR_D9
B1
2
DDR_D9
U1
A
RM_
A
0
A
RM_
A
0
DDR_D10
DDR_D10
C1
2
DDR_D10
DDR_D
7
DDR_D8
DDR_D8
A
1
2
DDR_D8
DDR_D3
DDR_D14
DDR_D
2
A
RM_
A
4
A
10
DDR_D14
DDR_D13
T
2
A
RM_
A
4
A
RM_
A
3
DDR_D11
A
11
DDR_D11
A
RM_
A
1
U
2
A
RM_
A
1
DDR_D11
DDR_D1
2
B11
DDR_D1
2
A
RM_
A2
U3
A
RM_
A2
C11
DDR_D13
T1
A
RM_
A
3
A
RM_
A7
DDR_
A
0
DDR_
A
1
A
RM_
A
8
B8
DDR_
A
1
R
2
A
RM_
A
8
DDR_D0
A
RM_
A6
T4
A
RM_
A6
8
6
5
7
4
2
1
3
R
X
1013
D1H8
22
04
A
0
2
4
8
6
5
7
4
2
1
3
R
X
1019
D1H8
22
04
A
0
2
4
8
6
5
7
4
2
1
3
R
X
10
2
0
D1H8
22
04
A
0
2
4
8
6
5
7
4
2
1
3
R
X
10
2
1
D1H8
22
04
A
0
2
4
8
6
5
7
4
2
1
3
R
X
10
22
D1H8
22
04
A
0
2
4
8
6
5
7
4
2
1
3
R
X
101
6
D1H8
22
04
A
0
2
4
8
6
5
7
4
2
1
3
R
X
101
7
D1H8
22
04
A
0
2
4
8
6
5
7
4
2
1
3
R
X
1018
D1H8
22
04
A
0
2
4
8
6
5
7
4
2
1
3
R
X
1015
D1H8
22
04
A
0
2
4
8
6
5
7
4
2
1
3
R
X
1014
D1H8
22
04
A
0
2
4
A
8
DDR_
A
0
R1
A
RM_
A7
P4
A
RM_
A
14
A
RM_
A
14
DDR_
A7
A
5
DDR_
A7
P3
A
RM_
A
13
A
RM_
A
13
DDR_D15
DDR_
A6
C
6
DDR_
A6
A
RM_D14
DDR_D5
H3
A
RM_D14
C15
DDR_D5
B15
DDR_D
7
A
14
DDR_D
6
DDR_D
6
A
RM_D15
H4
A
RM_D15
DDR_R
AS
DDR_D
Q
M0
C10
DDR_R
AS
DDR_C
AS
DDR_D
QS
1
C9
DDR_C
AS
A
RM_D1
L
2
A
RM_D1
A
RM_D0
DDR_D
Q
M1
DDR_C
S
A
9
DDR_C
S
L1
A
RM_D0
DDR_CKE
FL
AS
H_OE
4
2
1
3
R
X
1001
D1H44
7
3
2
0001
FL
AS
H_WE
C10
6
41
0
C10
66
4.
7
1
C10
6
5
0.1
C10
6
9
1
C10
7
0
1000P
C10
6
3
P19
Y
I4
P18
Y
I5
DDR_
A
4
J
19
CI4
H18
CI5
J
18
CI3
N18
Y
I
2
P
2
0
Y
I3
G19
CI
7
N
2
0
Y
I0
K18
CI
6
N19
Y
I1
DDR_
A
5
10
R103
7
10
R103
6
DDR_
A7
DDR_
A
9
DDR_
A
1
2
DDR_CKE
DDR_CLKN
DDR_CLK
DDR_
A
11
DDR_
A
8
DDR_
A6
A
1
7
DDR_CLK
DDR_CLK
DDR_CLKN
E
2
EM_OE
C1
6
DDR_CKE
F3
EM_CE0
DDR_WE
G4
EM_BEH
G3
EM_BEL
A
1
6
DDR_CLKN
E1
EM_WE
DDR_R
AS
DDR_C
AS
C1051
0.1
C
2
CFE1
C1
CFE
2
C8
V
REF
SS
TL
D3
CFIORD
D4
CFOE
0.01
C1050
DDR_
A
10
DDR_B
A
1
DDR_
A
0
DDR_B
A
0
E3
CFRD
Y
D1
CFW
A
IT
E4
CFIOI
S
1
6
P
2
1
Y
I
6
R
2
1
Y
I
7
D
2
CFIOWR
DDR_
A
1
DDR_
A2
DDR_
A
3
F4
EM_W
A
IT
DDR_C
S
C
7
V
GND
SS
TL
F1
EM_IO
C10
62
5P
C10
6
1
5P
FL
AS
H_CE
DDR_D
QS
0
DDR_WE
C3
FL
S
H_CE
B9
DDR_WE
1000P
C1059
C10
6
0
1
F
2
EM_CE1
J
1
A
RM_D8
A
RM_D8
J2
A
RM_D9
C13
DDR_D0
A
RM_D
6
A
RM_D
7
K4
A
RM_D
7
A
RM_D4
K
2
A
RM_D5
A
RM_D5
DDR_D
Q
M0
DDR_D
Q
M1
B1
7
DDR_D
Q
M1
B1
6
DDR_D
QS
1
DDR_D
QS
1
A
RM_D3
L4
A
RM_D3
A
15
DDR_D
Q
M0
K1
A
RM_D4
K3
A
RM_D
6
A
RM_D
2
L3
A
RM_D
2
DDR_D
QS
0
C1
7
DDR_D
QS
0
R1034
10K
R1035
10K
A
RM_
A
1
6
DDR_
A
9
C5
DDR_
A
9
N
2
A
RM_
A
1
6
A
RM_
A
19
M
2
A
RM_
A2
0
DDR_
A
1
2
A
3
DDR_
A
13
DDR_
A
11
B4
DDR_
A
11
A
RM_
A
18
N4
A
RM_
A
18
C4
DDR_
A
1
2
M1
A
RM_
A
19
N3
A
RM_
A
1
7
A
RM_
A
1
7
DDR_
A
10
A
4
DDR_
A
10
B5
DDR_
A
8
A
RM_
A
15
N1
A
RM_
A
15
DDR_
A
8
7
2
3
1
6
5
4
6
0
6
5
6
4
66
6
1
62
6
3
14
9
10
8
13
1
2
11
53
58
5
7
59
54
55
5
6
18
1
7
1
6
15
49
50
51
5
2
19
48
2
3
22
2
1
2
0
44
45
4
6
4
7
27
26
2
5
2
4
40
41
4
2
43
31
30
2
9
2
8
3
6
3
7
33
3
2
34
35
38
39
C3
A
BR
Y
00005
7
IC100
7
C1
A
B0000
2
94
2
IC1000
DIGIT
A
L MEDI
A
PROCE
SS
OR
V
1
7
Y
OUT0
Y
18
COUT
6
AA
18 COUT
7
V
1
6
Y
OUT3
Y
1
6
Y
OUT5
W1
6 Y
OUT4
W1
7 Y
OUT1
Y
1
7
Y
OUT
2
AA
19 COUT3
Y
19
COUT
2
W18 COUT5
V
18
COUT4
K19
CI
2
V
15
Y
OUT
7
AA
1
6 Y
OUT
6
L19
CI1
H19
CI0
W19 COUT1
Y2
0
COUT0
DDR_
V
REF
DDR_
V
REF
BU
S
_COUT
2
BU
S
_COUT1
BU
S
_COUT
6
BU
S
_COUT5
BU
S
_
Y
OUT5
BU
S
_
Y
OUT
6
BU
S
_
Y
OUT3
BU
S
_
Y
OUT4
V
DEC_
Y
OUT1
V
DEC_
Y
OUT0
V
DEC_
Y
OUT
2
BU
S
_
Y
OUT
7
BU
S
_
Y
OUT0
BU
S
_COUT
7
BU
S
_
Y
OUT
2
BU
S
_
Y
OUT1
BU
S
_COUT3
BU
S
_COUT4
BU
S
_COUT0
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
M
2
DDR
S
DR
A
M
A
8
A7
A
10(
A
P)
A
0
CK
CK
A
9
NC
C
S
WE
R
AS
C
AS
CKE
NC
A
1
2
DNU
UDM
VSS
LD
QS
V
DD
Q
UD
QS
VSSQ
V
DD
LDM
DNU
NC
V
REF
B
A
1
B
A
0
A
11
A
4
A
3
V
DD
VSS
A6
A
5
A
1
A2
V
DD
Q
VSSQ
VSS
D
Q
9
V
DD
Q
VSSQ
D
Q
0
V
DD
Q
V
DD
VSSQ
D
Q
15
D
Q2
D
Q
1
D
Q
13
D
Q
14
V
DD
Q
D
Q6
D
Q
5
VSSQ
D
Q
10
D
Q
3
D
Q
4
D
Q
1
2
D
Q
11
NC
NC
D
Q
8
D
Q7
M1: M
A
IN(1):
S
CHEM
A
TIC DI
A
GR
A
M - 1 ~ 4
M
2
: M
A
IN(
2
):
S
CHEM
A
TIC DI
A
GR
A
M - 5 ~
6
M3: M
A
IN(3):
S
CHEM
A
TIC DI
A
GR
A
M -
7
M4: M
A
IN(4):
S
CHEM
A
TIC DI
A
GR
A
M - 8 ~ 11
Summary of Contents for MW-20EB
Page 13: ...13 5 Location of Controls and Components 5 1 Main Unit Key Button Operations ...
Page 14: ...14 5 2 Remote Control Key Button Operations ...
Page 16: ...16 6 2 About the internal memory CDs and SDs ...
Page 17: ...17 6 3 Preparation for power source ...
Page 18: ...18 6 4 Connecting Recharging an iPod iPhone ...
Page 19: ...19 6 5 Connection to PC ...
Page 31: ...31 8 2 Types of Screws 8 3 Main Parts Location Diagram ...
Page 62: ...62 ...
Page 82: ...82 ...