63
12.5. Video/Audio Process (2) Block Diagram
DC-G9 VIDEO/AUDIO PROCESS(2) BLOCK DIAGRAM
IS2001
(VENUS ENGINE)
IC6402
(SYSTEM IC)
(SD0 CD ORG)
(SD0 UHS1 ON)
(SD0 POW ON L)
V44
(SD0 UHS2 ON)
(SD0 1.8V ON)
V46
IC6202
(REGULATOR)
2
3
4
1
VOUT
GND
VIN
VCNT
1
2
3
4
6
5
Q6201
QR6202
QR6201
QR6203
CD6201
PW SD3.15V
PW SD3.15V
PW SD3.15V
PW SD3.15V
9
1
2
5
7
8
WP
4
DAT2
CD/DAT3
CMD
CLK
DAT0/RCLK+
DAT1/RCLK-
WP
WP
VDD/VDD1
VSS4
13
VSS3
10
VSS2
6
VSS1
3
CD
C.DET
AV50
AW49
AU49
AT50
AR53
AT52
D26
G6
JK6201
(SD0 WP)
(SD0 DAT2)
(SD0 DAT3)
(SD0 CMD)
(G SD0 CLK)
(CKG SD0 DAT0)
(CKG SD0 DAT1)
16 D1+
AW53
(G SD0 U2 D1P)
15 D1-
AY52
(G SD0 U2 D1M)
12 D0-
AV52
(G SD0 U2 D0M)
11 D0+
AU53
BM32
AF4
AF2
G9
(G SD0 U2 D0P)
14
VDD2
CD
IC6203
(REGULATOR)
2
3
4
1
VOUT
GND
VIN
VCNT
(PW SD0 3018V)
QR6002
VSS5
17
W43
(SD0 POW ON L2)
AT46
CD6202
CD6203
AY46
AY48
(SD0 CD)
SDDETOUT
SDDETIN
DACOUT1
C11
PIOC0
D3
U43
RL6416
RL6420
(WiFi RESET)
(WiFi RESET)
(G WiFi CLK)
(WiFi CMD)
(WiFi DAT0)
(WiFi DAT1)
(WiFi DAT2)
(WiFi DAT3)
(WiFi INT)
(WiFi CLK)
(WiFi CMD)
(WiFi DAT0)
(WiFi DAT1)
(WiFi DAT2)
(WiFi DAT3)
(WiFi RESET)
(WiFi CLK)
(WiFi CMD)
(WiFi DAT0)
(WiFi DAT1)
(WiFi DAT2)
(WiFi DAT3)
AR1
AT2
AT4
AR3
AR5
AP2
BK12
WIFI BT P.C.B.
FP6008
31
FP6008
33
FP6008
37
FP6008
35
FP6008
34
FP6008
41
FP6008
36
(W-LAN MODULE)
Wi-Fi
ANTENNA
SDIO CLK
15
SDIO CMD
17
SDIO D0
ANT
21
SDIO D1
20
SDIO D2
19
SDIO D3
18
42
RESET
35
RTCCLK OUT
RTCCLK IN
15
FP8501
13
FP8501
9
FP8501
12
FP8501
10
FP8501
11
FP8501
5
FP8501
(RF PMUEN)
(RF PMUEN)
(RF PMUEN)
FP6008
44,45
PMUEN
29
1,2
FP8501
(WiFi INT)
(WiFi INT)
(WiFi RESET)
(WiFi CLK)
(WiFi CMD)
(WiFi DAT0)
(WiFi DAT1)
(WiFi DAT2)
(WiFi DAT3)
(RF PMUEN)
(WiFi INT)
FP6008
42
WIFI INT B
33
4
FP8501
BATTERY FPC
BATTERY P.C.B. UNIT
WIFI FPC
(32.72KHz)
32
31
L11
BACKUP CTL2
PW D1.8V
(SD0 CD)
B26
(SD UHS-2 CARD SOCKET)
WiFi INT
(To Q6002-S)
FP1981
14
FP1981
12
FP1981
8
FP1981
10
FP1981
11
FP1981
4
FP1981
9
FP1981
1
FP1981
3
FP1983
2
FP1983
4
FP1983
8
FP1983
6
FP1983
5
FP1983
12
FP1983
7
FP1983
15,16
FP1983
13
PW D3.15V
(KA LED)
(AN LED)
PW UNREG SYS
PW D5.2V
(LCD SEGMENT DRIVER)
SEG0-25
SEG20
SEG0
COM0-7
STATUS
LCD
SEGMENT
DRIVER
COMMON
DRIVER
FP7802
35
39
FP7802
FP7802
6
26
FP7802
FP7802
5
FP7802
4
SEG25
SEG21
SDA
SCL
COM7
COM0
24
4
46
42
LCD BIAS
SELECTOR
LCD VOLTAGE
GENERATOR
32
48
VLCD
VDD
VSS
2
3
47
25
COMMON
COUNTER
COMMAND
DATA DECODER
IF FILTER
COMMAND
REGISER
POWER ON
RESET
SERIAL
INTERFACE
OSCILLATOR
DDRAM
1
FP7802
27
34
FP7802
(D3.1V)
(UNREG)
(STA 5V CTL)
(G I2C DA3)
(G I2C CK3)
(D5.2V)
(I2C SDA)
(I2C SCK)
TOP P.C.B.
FP7801
5,6
TOP MAIN FPC
FP7801
7
FP7801
10
FP7801
9
FP7801
3,4
(STA BL DAC)
(D3.1V)
(PW UNREG SYS)
(STA 5V CTL)
(STA 5V CTL)
(G I2C DA3)
(G I2C CK3)
(G I2C DA3)
(G I2C CK3)
(D5.2V)
(STA BL DAC)
(STA BL DAC)
(STA 5V CTL)
(G I2C DA3)
(G I2C CK3)
(STA BL DAC)
FP7801
8
FP7801
1,2
FP1001
4,5
FP1001
6
FP7001
9
FP1001
8
FP1001
2,3
FP1001
7
FP1001
1
FP6004
4,5
FP6004
6
FP6004
9
FP6004
8
FP6004
2,3
FP6004
7
FP6004
1
(REGULATOR)
3
4
5
2
1
VSS
VIN VOUT
CE
NC
6
5
4
1
2
3
PT6001
PW D3.15V
Summary of Contents for LUMIX DC-G9P
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Page 21: ...21 ...
Page 22: ...22 4 2 Lens ...
Page 30: ...30 ...
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Page 38: ...38 9 1 2 P C B Location ...
Page 41: ...41 Fig D2 Fig D3 ...
Page 42: ...42 Fig D4 Fig D5 ...
Page 43: ...43 Fig D6 Fig D7 9 1 3 2 Removal of the Top Unit Fig D8 ...
Page 44: ...44 Fig D9 Fig D10 ...
Page 45: ...45 Fig D11 9 1 3 3 Removal of the Main P C B Fig D12 ...